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10-7. Operation program ROM pin discriptions (µPD23C4001EBGW-304)
Pin No.
Name
2~12,23,
A0~A18
25~31
13~15, 17~21 O0~O7
16
GND
22
CEB
24
OEB
1, 32
N.C., VCC
10-8. RAM pin discriptions (M5M51008AFP-10LL)
Pin No.
Name
2~12,23,
A0~A16
25~28, 31
13~15, 17~21 O0~O7
16
GND
22
CS1
24
OEB
1, 32
N.C., VCC
29
WEB
In/Out
Status
Status
of OFF
of ON
In
L
Pulse
Out
L
Pulse
In
L
L
In
H
Pulse
In
L
Pulse
In
L
H
In/Out
Status
Status
of OFF
of ON
In
L
Pulse
Out
L
Pulse
In
L
L
In
H
Pulse
In
L
Pulse
In
L
H
In
H
Pulse
— 24 —
Description
Address bus line (A0~A14, RA15~RA18)
Data bus line (IO0~IO7)
GND terminal
Chip enable signal from Gate array
Output enable signal from Gate array
VDD terminal
Description
Address bus line (A0~A14, RA15, RA16)
Data bus line (IO0~IO7)
GND terminal
Chip enable signal from Gate array
Output enable signal from Gate array
VDD terminal
Write enable signal from CPU
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