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Electrical Design
4.1
Probe Loading Effect
The logical probing of the PCI Express bus is achieved by tapping a small amount of energy
from the probed signals and channeling this energy to the analyzer. To avoid excessive
loading conditions, the Teledyne LeCroy mid‐bus probe employs high impedance tip
resistors (isolation resistors). The probe isolation resistance is selected to both satisfy the
probe sensitivity and system parasitic load requirements.
Extensive care has been taken to reduce the parasitic effect of the probed signals during
each phase of the mid‐bus probe design. The equivalent load model of the Mid‐bus probe
is available in HSPICE parameters. It is an empirical‐based model that involves complicated
connectivity. It can be requested from the Teledyne LeCroy Protocol Systems Group
support team (psgsupport@teledynelecroy.com)
With this unique design, the Teledyne LeCroy mid‐bus probes can capture bus traffic
signals with amplitudes specified by the PCI Express standard, while introducing only
slight loss and jitter on the channel under test. To determine the exact numbers,
customers are encourage to simulate their channel using Teledyne LeCroy's model.
Chapter 4
PCIe 3.0 Mid‐Bus Probe Installation and Usage Guide
17
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