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T
S
3
2
M
~
1
G
C
F
T
S
3
2
M
~
1
G
C
F
T
S
3
2
M
~
1
G
C
F
3.9 I/O Input (Read) Timing Specification
Item
Data Delay after IORD
Data Hold following IORD
IORD Width Time
Address Setup before IORD
Address Hold following IORD
CE Setup before IORD
CE Hold following IORD
REG Setup before IORD
REG Hold following IORD
INPACK Delay Falling from IORD
INPACK Delay Rising from IORD
IOIS16 Delay Falling from Address
IOIS16 Delay Rising from Address
Wait Delay Falling from IORD
Data Delay from Wait Rising
Wait Width Time3
Transcend Information Inc.
8
0
8
0
8
0
Symbol
td(IORD)
th(IORD)
tw(IORD)
tsuA(IORD)
thA(IORD)
tsuCE(IORD)
thCE(IORD)
tsuREG (IORD)
thREG (IORD)
3
tdfINPACK (IORD)
3
tdrINPACK (IORD)
3
tdfIOIS16 (ADR)
3
tdrIOIS16 (ADR)
3
tdWT(IORD)
3
td(WT)
tw(WT)
Cycle Time Mode:
250 ns
IEEE
Min
Symbol
ns.
tlGLQV
tlGHQX
0
tlGLIGH
165
tAVIGL
70
tlGHAX
20
tELIGL
5
tlGHEH
20
tRGLIGL
5
tlGHRGH
0
tlGLIAL
0
tlGHIAH
tAVISL
tAVISH
tlGLWTL
tWTHQV
tWTLWTH
23
80X CompactFlash Card
120 ns
100 ns
Max
Min
Max
Min
ns.
ns.
ns.
ns.
100
50
5
5
70
65
25
25
10
10
5
5
10
10
5
5
0
0
1
45
0
na
0
1
45
na
1
35
na
1
35
na
35
35
0
0
350
350
80 ns
Ma
Max
Min
x
ns.
ns.
ns.
50
45
5
55
15
10
5
10
5
0
1
1
na
0
na
1
1
na
na
1
1
na
na
1
1
na
na
2
35
na
2
0
na
2
350
na
V 1 . 1
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