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d o c u m e n t a t i o n
IPC/RSL8xxx-XxxxE
Document Ordercode: DOC/IPC_RSL8-E
Revision
Date
1.0
05.06.2015
1.1
23.05.2016
1.2
17.10.2016
1.3
24.01.2017
1.4
23.02.2017
1.5
22.03.2017
1.6
09.05.2017
1.7
20.06.2017
1.8
04.07.2017
1.9
15.12.2017
Author
Modification
U. Müller
Release
U. Müller
technical data corrected
U. Müller
added USB current limit values
U. Müller
extended safety information and D-coded LAN
F. Liechti
Added safety information on power supply
U. Müller
Reduced supply voltage to nominal 24V only
U. Müller
Added safety information for power wiring
S. Mutter
Added IPC/RSL8H19-BxxxE systems
S. Mutter
Added EMC Standards for -BxxxE systems
U. Müller
added backup time, corrected LVDS signals
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Summary of Contents for syslogic IPC/RSL8-X E Series
- Page 1 u s e r d o c u m e n t a t i o n IPC/RSL8xxx-XxxxE Document Ordercode: DOC/IPC_RSL8-E Revision Date Author Modification 05.06.2015 U. Müller Release 23.05.2016 U. Müller technical data corrected 17.10.2016 U. Müller added USB current limit values 24.01.2017 U.
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Page 2: Table Of Contents
LVDS Display-Interface (optional) 3.3.3. High Definition Audio (optional) 3.3.4. Buzzer / Buzzer Interface (optional) 3.3.5. CFast-Interface / SATA (optional) 3.3.6. Serial Ports 3.3.7. Keyboard Interface (optional) 3.3.8. USB Interface 3.3.9. Ethernet LAN Interface 3.3.10. I2C Interface © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... - Page 3 Powering the RSL8 System 5.3. Cabling the interfaces 5.4. Grounding 5.5. Cabling of communication links 6 Service 6.1. Replaceable Parts 7 Technical Data 7.1. Electrical Data 7.2. EMI/EMC Data 7.3. Environmental specification 7.4. Mechanical Data © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 4 8 Firmware 8.1. Software Structure 8.2. Firmware Functions 8.3. Application Programming Interface (API) 9 Product Revision History 9.1. Hardware 9.2. Firmware 9.3. Erratas 10 Manufacturer Information 10.1. Contact 80 10.2. Warranty 10.3. RMA Service © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 5 Tab. 36 General Recommended Operating Conditions ............71 Tab. 37 General Electrical Characteristics................72 Tab. 38 General Switching Characteristics ................73 Tab. 39 Hardware Revision State ..................78 Tab. 40 Firmware Revision State ..................78 © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 6 Isolated communication link ..................68 Fig. 16 Non isolated communication link with common chassis potential ......68 Fig. 17 Service parts replacement ..................69 Fig. 18 Mechanical Outline Enclosure RSL ................. 75 Fig. 19 Mounting Plate ......................76 © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
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Page 7: Introduction
Note that the documentation for the products is constantly revised and improved. The right to change this documentation at any time without notice is therefore reserved. Syslogic is grateful for any help referring to errors or for suggestions for improvements. The following registered trademarks are used:... -
Page 8: Documents
– IEEE Standards Department www.ieee.org – Global Engineering Documents www.global.ihs.com 1.4. Items delivered The RSL8 comes without external cabling and power supply. These additional items must be ordered separately and installed according to the respective user documentations. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 9: Installation
Do not open the service cover unless you are instructed and entitled to do this. The service cover is intended for inserting the CFast software storage card on initial operation of the product by an instructed person only. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 10: Electro-Static Discharge
(including all the small parts). Follow the assembly guidelines in chapter 5 strictly. The installation procedures must be strictly observed. Note that deviations from the installation guidelines may result in degraded operational reliability or in unfavourable EM-radiation or EM-susceptibility. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 11: Operation
The main functionality of the RSL8 system is defined by the application programs running on the processor board. The application programs are not part of the delivery by Syslogic but are defined, developed and tested by the customer or a system-integrator for each specific application. -
Page 12: Product Description
– supervised battery backup for Real Time Clock – PC/104 bus interface for expansion with standard 8 bit I/O PC/104 communications and I/O boards – Optionally integrated WLB_PG expansion board for GPS and LTE /UMTS support (BxxxE-versions) © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 13: Fig. 1 Block Diagram Rsl8 (All Functions)
IPC/RSL8xxx-XxxxE: user documentation DOC/IPC_RSL8-E; V1.9 Fig. 1 Block Diagram RSL8 (all functions) Important Note Check the product variant carefully for the supported functions. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 14: Product Variants
Buzzer Buzzer Buzzer Buzzer Buzzer CFast SDCard PC/104 Slot Li battery Li battery Li battery Li battery Li battery Li battery Backup UMTS/LTE Tab. 1 Product Variants RSL For additional variants please contact manufacturer. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 15: Operating Modes
PWM Register 820Dh normal by PWM Register 820Dh factory modes inverted by BIOS setting (do not use) inverted by BIOS setting inverted by PWM Register 820Dh inverted by PWM Register 820Dh Tab. 2 Startup Modes © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 16: Hardware Description
Overview The RSL8 hardware may be configured by software (CMOS setup) and by switch settings. Custom BIOS configuration can be programmed into the BIOS flash on request (ask Syslogic technical support for custom BIOS configuration). The switch and connector locations are shown in the board layout drawing (Fig. 2). -
Page 17: Fig. 2 Board Layout Rsl8 (All Functions)
IPC/RSL8xxx-XxxxE: user documentation DOC/IPC_RSL8-E; V1.9 Fig. 2 Board Layout RSL8 (all functions) © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 18: Fig. 3 Board Top View (Ipc/Rsl8-Board)
IPC/RSL8xxx-XxxxE: user documentation DOC/IPC_RSL8-E; V1.9 Fig. 3 Board Top View (IPC/RSL8-Board) © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 19: Memory And I/O Resources
2-4 Gbyte Main Memory (DRAM) including graphics memory (UMA) 0000’0001‘0000’0000.. optional 4 Gbyte Main Memory 64-bit mode only 0000’0001‘FFFF’FFFFH (DRAM) 0000’0002‘0000’0000.. up to top 64-bit mode only 0000’000F‘FFFF’FFFFH Tab. 3 Physical Memory Address Space Layout © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 20: Fig. 4 Memory Map
IPC/RSL8xxx-XxxxE: user documentation DOC/IPC_RSL8-E; V1.9 Fig. 4 Memory Map © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 21: General I/O Layout And Configuration
Parallel Port (LPT2) and Plug'n Play 0280..02E7H reserved 02E8..02EFH Serial Port (COM4) 02F0..02F7H reserved 02F8..02FFH Serial Port (COM2) 0300..036FH not used 0370..0377H reserved for external Secondary Floppy Controller 0376..0377H reserved for external Secondary IDE Channel 0378..037FH Parallel Port (LPT1) © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 22: Tab. 4 I/O Address Space Layout
7000..7FFFH not used 8000..81FFH reserved 8200..821FH RSL8 system registers 8220..83FFH reserved for Syslogic IPC add-on boards 8400..BFFFH reserved C000..FFFFH reserved for PCI devices (VGA, Ethernet, USB, SATA) Tab. 4 I/O Address Space Layout © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 23: Tab. 5 Factory Programming Header P11 (1X6 Pin)
PGD (ICSPDAT, do not connect) PICkit3 pin 4 PGC (ICSPCLK, do not connect) PICkit3 pin 5 PGM LVP (SCL, do not connect) PICkit3 pin 6 -- (SDA, do not connect) Tab. 7 Factory Programming Header P17 (1x7 pin) © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 24: Peripheral Devices
CLK# TMDS Clock VGA_RED Analog VGA not supported VGA_GREEN Analog VGA not supported VGA_BLUE Analog VGA not supported HSYNC Analog VGA not supported VGA_GND Analog VGA not supported Tab. 8 DVI-D connector P5 (DSUB15HD) © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... - Page 25 Maximum cable length for DVI-D connection is dependent on pixel clock frequency (about 5 m for 1920x1200 resolution). Use high quality shielded DVI-D cables (with twisted diff pair wires for TMDS signals) for maximum EMI protection. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
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Page 26: Lvds Display-Interface (Optional)
Direct inverter connection is provided through P31 if power requirement is not to high. Note that special BIOS-Settings are required for operation of the LVDS display interface. Contact Syslogic technical support for details. Device Connection (LVDS-Panel) Mating connector type: Hirose DF13-40DS-1.25C, Crimp contact DF13-3032SCF. -
Page 27: Tab. 10 Backlight Connector P31 (Molex 53398-0871)
Do not draw more than 1.0 Ampere from VCC_INV (max. 0.5 Ampere per pin). Check inverter board datasheet for polarity of brightness control and other requirements. This interface is intended for case internal use only. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 28: Tab. 11 Lvds Configuration Options
Analog 0-5V PWM 0-3.3V PWM 0-5V Tab. 11 LVDS Configuration Options For S1 settings see Tab. 2. Important Note Switch S5 must be set correctly before applying power. False settings may damage display and/or backlight. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 29: High Definition Audio (Optional)
Signal Remarks SDATA_IN SDATA_OUT RST# Reset SYNC BITCLK SPKR +V5S 5V supply * +V3.3S 3.3V supply * Tab. 12 HDAudio interface connector P47 Important Note This interface is intended for case internal use only. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 30: Buzzer / Buzzer Interface (Optional)
Mating connector type: Housing Molex 51021-0200, Crimp contact Molex 50058-8100. Wiring: AWG26. Pin Number Signal Remarks BUZ+ (5V) not fused BUZ- (buzzer drive signal) 100mA max Tab. 13 Buzzer interface connector P3 Important Note This interface is intended for case internal use only. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 31: Cfast-Interface / Sata (Optional)
PC15 PGND PC16 PGND PC17 Tab. 14 CFast Connector P8 (SATA Channel 0) Important Note Do not insert or remove the CFast card when power supply is on. This interface does not support hot-plugging. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 32: Tab. 15 Sata Data Connector P81 (Sata Channel 1)
Device Connection (SATA Power) Mating connector type: Housing Molex Micro-Fit 3.0 order number 43645-0200, Crimp contact Molex 43030 series. Pin Number Signal Remarks +5V (not fused) Tab. 16 SATA Power Connector P82 (SATA Channel 1) © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 33: Serial Ports
Crimp contacts included (M80-0130005). Recommended wire type: BS3G210 type A, PTFE insulated, 24-28AWG, max insulation diameter 1.10mm. Pin Number Signal Pin Number Signal DCD* DSR* RTS* CTS* DTR* +5V (not fused) Tab. 18 Serial Ports COM3-4 internal Headers P43-44 (2x5 pin) © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 34: Keyboard Interface (Optional)
Pin Number Signal Remarks +5V (not fused) KBDATA KBCLK Tab. 19 PS/2 Keyboard connector P4 Important Note Maximum cable length allowed for keyboard connection is 3 m. Use shielded cables for maximum EMI protection. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 35: Usb Interface
EMI/RFI "CE"-certification. Only use high quality industrial USB devices with sufficient EMI compatibility. Use shielded cables for maximum EMI protection. Drawing excessively power might disturb operation. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 36: Ethernet Lan Interface
Pin Number Signal Remarks MDX0+ MDX0- MDX1+ MDX1- MDX3+ MDX3- MDX2- MDX2+ Tab. 22 Ethernet Twisted Pair Interface Connector P18 and P19 (M12 X) Fig. 5 M12 X-coded Female Pinout (front view) © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 37: Tab. 23 Ethernet Twisted Pair Interface Connector P18 And P19 (M12 D)
Pin Number Signal Remarks MDX0+ TXD+ MDX1+ RXD+ MDX0- TXD- MDX1- RXD- Tab. 23 Ethernet Twisted Pair Interface Connector P18 and P19 (M12 D) Fig. 6 M12 D-coded Female Pinout (front view) © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 38: I2C Interface
Configuration Options Switch Configuration Remarks see Tab. 2. even positions ‘0’, ‘2’, ‘4’, ‘6’, ‘8’ = 1 s see Tab. 2. odd positions ‘1’, ‘3’, ‘5’, ‘7’ = 100 ms Tab. 25 Watchdog Configuration Options © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 39: Power Supply
1 (GND) of the connector. Pin 1 (+24VDC_AUX) is reserved, leave open. Pin 3 is used as an input for either a power fail or remote on/off signal. Fig. 7 M12 A-coded Male Pinout (front view) © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 40: Power Supervision
Tab. 27 Power fail input configuration Switch Configuration Remarks position ‘0’ = bypass mode (for power fail mode) check chapter position ‘1’ to ‘F’ = remote on/off mode 3.3.14/3.3.15 Tab. 28 Power fail mode configuration © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 41: Power Fail
The application has to poll the power fail flag and call different functions according to the state of the flag. Start do some work Power Fail Flag set? do power fail stuff Fig. 9 Typical power fail flow © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 42: Remote On/Off
Tab. 29 PCU timing configuration through S14 When switch S14 is in position 0 the PCU is in bypass mode. Application example car battery Power Supplies System power on/off request shutdown ignition Fig. 10 Application example: CAR PC © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 43: Fig. 11 Startup Timing Diagram
IPC/RSL8xxx-XxxxE: user documentation DOC/IPC_RSL8-E; V1.9 Fig. 11 Startup timing diagram Fig. 12 Shutdown timing diagram Important Notes The operating system must support the remote on/off function. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 44: Expansion Bus Interface
B23 power, always on +5V +3.3V power, always on B24 power, always on +5V +3.3V power, always on B25 power, always on Tab. 30 Expansion Bus Connector P51 © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 45: Pc/104 Bus Interface (Optional)
SA3 BALE SA2 +5V reserved reserved SA1 OSC reserved reserved SA0 GND GND GND Tab. 31 PC/104 Bus Connectors PA/PB, PC/PD © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 46: Frontside Status Leds
Setup register in chapter 4 Yellow down Disk activity SATA/CFast only The LEDs beside the LAN connectors show status information of the corresponding LAN interface which is dependent on the driver used. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 47: Gps (Optional)
The GPS module supports dead reckoning to provide position data even if there are no accurate satellite visibility available. Dead reckoning is available after an initialization phase where the internal sensors are calibrated. Refer to u-Blox documentation to get best performance. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 48: Lte (Optional)
LTE Antenna must meet the requirements of u-Blox documentation. Especially check SWR, gain, maximum Power and impedance. Important Note The LTE Modem provides a diversity antenna that is not used. It is required to disable the RX-Diversity antenna using AT- commands. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 49: Ipc/Wlb-Pg Controller (Optional)
Disable LTE connection (air plane mode) • Check if SIM0 and SIM1 are inserted • Check if lid of SIM0 and SIM1 are closed • Read LTE status flag. For detailed documentation refer to DOC/IPC_WLBPG-E documentation. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 50: Programming Information
Most configuration options are handled by the BIOS. For detailed information refer to the NETIPC firmware documentation and other related documents as listed in paragraph 1.3. Please contact Syslogic technical support if you need special BIOS configuration. 4.2. Interrupt, Memory and I/O Resources 4.2.1. -
Page 51: Memory Resources
Boot Mode Input Register 820BH I2C Register for Temp Sensor 820CH Configuration Switch Input register 820DH PWM-Register for LCD Inverter Brightness Control Reset state = FFH 820E..821FH reserved do not access Tab. 34 RSL8 System Registers © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... - Page 52 ERRINT# Error Interrupt Status Read Write 0 = Error Interrupt pending 1 = No error interrupt pending PWRFAIL# Power Fail Status Flag Read Write 0 = Power Fail active 1 = Power Fail inactive © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 53 Read Write not used, returns 0 FREEZE Freeze bit Read Write not used, returns 1 ERREN# Error Interrupt Enable (PC/104 bus IOCHCK# routed to NMI) Read Write always 0 = Error Interrupt on NMI © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 54 Upon startup STOP# is active (LED on) until the BIOS has initialized the main peripherals, it is set inactive (LED off) before booting the operating system. STOP# is also active (LED on) while operating in Bootloader mode. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 55 5 = 64s 5 = 64s 6 = 128s 6 = 128s 7 = 256s 7 = 256s reserved Reserved, always write 0 Note Watchdog timeout selection values > 0 are independent of switch S1 setting. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 56 (also clearing the Watchdog timeout status bit) 5Ah = Writing data 5Ah invokes a complete power off or power reset (also clearing the Watchdog timeout status bit), system restarts depending configuration power management controller. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 57 Upon startup READY is inactive (LED off) until the BIOS has initialized the main peripherals, it is set active (LED on) before booting the operating system. Always read back the current state before programming this setup register for enabling the watchdog! © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 58 Revision ID Register 8206h Access RID[7:0] Revision ID Read reserved, always write 0 Write same as Read value Reset Description: Logic Design Revision ID Read Write see Product Revision History reserved Reserved, always write 0 © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 59 Description: Reserved reserved Read Write Reserved reserved, do not write Socket Memory Window Base Address Register 8209h Access Read reserved Write 0000’0000 (0x00) Reset Description: Reserved reserved Read Write Reserved reserved, do not write © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 60 Write 0000’0011 (0x03) Reset Description: BM1..0 Boot Mode Inputs Read Write 0 = reserved 1 = reserved 2 = boot from backup BIOS 3 = normal Operating Mode Reserved reserved, do not write © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 61 Clock Port Pin State Read Write 0 = Pin state = low 1 = Pin state = high Data Port Pin State Read Write 0 = Pin state = low 1 = Pin state = high © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
- Page 62 S5. Value 0 corresponds to voltage level 0, value FFh corresponds to maximum voltage level (2.5V or 5V). Signal may be inverted by setting of switch S1 (see Tab. 2). Please check inverter datasheet for translation of voltage level to brightness. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com...
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Page 63: Peripheral Devices
IBM PC/AT Technical Reference or similar documentation. Low level programming is handled by the VESA compatible VGA-BIOS. For custom LCD BIOS requirements please contact Syslogic technical support. For detailed programming information please refer to the Intel Atom E38xx technical reference or similar documentation. -
Page 64: Temperature Sensor
BIOS and should not be disabled by application software. 4.3.9. PC/104 Bus Interface For detailed description of PC/104 add-on board programming please consult PC/104 and ISA bus standard documentation and related PC/AT architecture literature as well as the add-on boards documentation. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 65: Installation And Cabling
Use an overload protected power supply to prevent damage in case of a short inside the system. The ac/dc power supply must fulfill the requirements for EMI/RFI "CE"-certification. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 66: Cabling The Interfaces
Important notes Grounding of the cables shields using "pig-tail wires" are not recommended because of their high impedance at high frequencies. It is better to clamp the shields onto a grounded copper rail. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 67: Cabling Of Communication Links
Fig. 16 shows an isolated system with independent grounds. Important notes Grounding of cable shields using "pig-tails wires" are not recommended because of their high impedance at high frequencies. It is recommended to clamp the shields onto a grounded copper-rail. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 68: Fig. 15 Isolated Communication Link
IPC/RSL8xxx-XxxxE: user documentation DOC/IPC_RSL8-E; V1.9 Fig. 15 Isolated communication link Fig. 16 Non isolated communication link with common chassis potential © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 69: Service
When inserting a new flash card be sure that it is fully compliant with the CFast standard. Syslogic highly recommends CFast flash cards specified for industrial use by the card manufacturer. Check temperature range and durability to comply with your requirements. -
Page 70: Technical Data
85 °C Tab. 35 General Absolute Maximum Ratings Due to the large effect of self-discharge at high temperature of the Lithium Battery it is recommended to store the device at around +25°C. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 71: Tab. 36 General Recommended Operating Conditions
(1) this parameter is highly dependent on mounting, air flow and GPU load; with the Intel SpeedStep technology the processor automatically reduces the internal cpu clock down to 500MHz when the critical thermal trip points are reached to prevent damage. Tab. 36 General Recommended Operating Conditions © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 72: Tab. 37 General Electrical Characteristics
LCD inverter enable control disable state Il<4mA LCD inverter enable control enable state Ih<4mA LCD inverter brightness control I=10mA USB Overcurrent Limit USB on internal connector P21 Ilimit all other USB connectors Ilimit Tab. 37 General Electrical Characteristics © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 73: Tab. 38 General Switching Characteristics
Real Time Clock base clock frtc 32.768 Real Time Clock accuracy (25°C) +/-20 Real Time Clock temperature coefficient -0.04 ppm/(°C)² Real Time Clock aging +/-3 ppm/year LCD inverter brightness PWM base clock fpwm Tab. 38 General Switching Characteristics © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 74: Emi/Emc Data
Shock and vibration tests EN 60068-2-27 Basic environmental testing procedures – Part 2-27: Test Ea and guidance: Shock and guidance EN 60068-2-64 Environmental testing – Part 2-6: Test Fh: Vibration, broadband random and guidance © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 75: Mechanical Data
IPC/RSL8xxx-XxxxE: user documentation DOC/IPC_RSL8-E; V1.9 7.4. Mechanical Data Fig. 18 Mechanical Outline Enclosure RSL © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 76: Fig. 19 Mounting Plate
IPC/RSL8xxx-XxxxE: user documentation DOC/IPC_RSL8-E; V1.9 Fig. 19 Mounting Plate © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 77: Firmware
1A (e.g. Watchdog). Please refer to the appropriate documentation for detailed information. 8.3. Application Programming Interface (API) The RSL8 system does not contain any special API beside the installed BIOS. Refer to the BIOS and Operating System documentation for API specifications. © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 78: Product Revision History
IPC/ RSL8Hxx-AxxxE #x S8D2R011 27.06.2016 Release 2.0 IPC/ RSL8Gxx-AxxxE #x D1R011B 27.06.2016 3.1, default CMOS settings for USB adjusted IPC/ RSL8Hxx-AxxxE #x D2R011B 27.06.2016 3.1, default CMOS settings for USB adjusted Tab. 40 Firmware Revision State © Syslogic Datentechnik AG, Switzerland, http://www.syslogic.com... -
Page 79: Erratas
BIOS. It is important therefore that neither the application software nor the operating systems reprograms the processor chipset's configuration registers. Note that prototype board erratas (boards with revision #0) are not listed here. Contact Syslogic technical support for prototype board information. -
Page 80: 10 Manufacturer Information
10.3. RMA Service Syslogic offers a Return Material Authorization process to simplify handling of devices that needs to be returned to the manufacturer. Please follow the instructions on our web page: https://www.syslogic.com to get best service.
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