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6ES7 972-4AA02-0XA0
User manual
Timing; Fault Scenarios In Adp Master System With Prb S - Siemens 6ES7 972-4AA02-0XA0 User Manual
Power rail booster
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6ES7 972-4AA02-0XA0
User Manual
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User´s Guide Power Rail Booster
Version 12/2005
7.2.3
Timing
When a message frame is transferred, the bit time for the zero bit, the data bits and
the parity bit is 50 ms. The start and stop bits have a bit time of 150 ms. The transfer
time may not deviate by more than +/- 2%. The total transfer time for one message
frame is 800 ms. There must be a pause of at least one second (minimum character
delay time) between transfers of two message frames.
7.3 Fault Scenarios in a DP Master System with PRBs
The Figure below shows possible fault locations in a DP master system with Power
Rail Boosters.
Fig. 31: Possible fault locations in a DP master system with Power Rail Boosters
Locations and displays for the various faults are listed below:
Fig. 32: Fault location
Copyright © Siemens AG 2005 All rights reserved.
6ES7 972-4AA02-0XA0
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