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digital pulse or train comes in on the source and is propagated to the destination. When the
source signal goes from low to high, this rising edge is transferred to the destination after a
propagation delay through the module.
routing operation.
Some delay is always associated with an asynchronous route, and this delay varies among
PXIe-6674 modules, depending on variations in temperature and chassis voltage. Typical
delay times in the PXIe-6674 for asynchronous routes between various sources and
destinations are given in the device's Specifications.
Asynchronous routing works well if the total system delays are not too long for the
application. Propagation delay could be caused by the following reasons.
•
Output delay on the source.
•
Propagation delay of the signal across the backplane(s) and cable(s).
•
Propagation delay of the signal through the PXIe-6674.
•
Time for the receiver to recognize the signal.
Both the source and the destination of an asynchronous routing operation on the PXIe-6674
can be any of the following lines:
•
Any front panel PFI pin (PFI<0..5>) as single ended.
•
Any front panel PFI pin as LVDS (PFI_LVDS<0..2>)
•
Any PXI star trigger line (PXI_STAR<0..16>)
•
Any PXI trigger line (PXI_TRIG<0..7>)
•
Any PXIe_DSTARB<0..16>
Synchronous Routing
A synchronous routing operation is defined in terms of three signals: a source, a destination,
and a synchronization clock. Unlike asynchronous routing, the output of a synchronous routing
operation does not directly follow the input after a propagation delay. Instead, the logic state of
the input is sampled on each active edge of the synchronization clock, and the output is set to
that logic state after a small delay, as shown in
Figure 8.
on page 23 shows a timing diagram that illustrates synchronous routing.
22 | ni.com | PXIe-6674 User Manual
Figure 7.
Figure 7. Asynchronous Routing Operation
Trigger Input
Trigger Output
on page 22 illustrates an asynchronous
Propagation Delay
t
pd
Figure 8.
on page 23.
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