LG 60PC1D Training Presentation page 72

P12
VS
5VDC VA
60PC1D Z SUS
Block Diagram
+ C18
Logic from the Control PCB.
P2
IC1, IC24
5VDC VA 5VDC
P1
Plasma Display Panel Troubleshooting - 2007
Gnd
SUS_DN
SUS_UP
5VDC
Gnd
18VDC
Gnd
ER-UP
ER-DN
Gnd
18VDC
18V IPM
VA
Z Bias Control VR3
P9
Chassi GND
SUS_OUT
SUS_IPM
VS
ER_LOW
ER_IO
ER_IPM
ER_HIGH
R42
Z Bias Circuit
72
P3
D8
D10
D9
P5
L1
L2
L3
D17
Output
Waveform TP
95 95 95
V V V
Z Z Z
B11
P6
Q16,
Q18
To PDP
To PDP
95V 95V 95V Vs Vs Vs
To PDP