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Digi NET+50 Manual

Jumpers and components
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NET+50/20M Jumpers
and Components
90000282_C

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Summary of Contents for Digi NET+50

  • Page 1 NET+50/20M Jumpers and Components 90000282_C...
  • Page 3 NET+50 Jumpers and Components Guide Part number/version: 90000282_C Release date: March 2006 www.digi.com...
  • Page 4 Digi provides this document “as is,” without warranty of any kind, either expressed or implied, including, but not limited to, the implied warranties of, fitness or merchantability for a particular purpose. Digi may make improvements and/or changes in this manual or in the product(s) and/or the program(s) described in this manual at any time.

  • Page 5: Table Of Contents

    C h a p t e r 3 : N E T + W o r k s D e v e l o p m e n t B o a r d B i l l o f M a t e r i a l s ..................27 BOM — NET+50 development board..........28 i i i...
  • Page 7 Using This Guide eview this section for basic information about this guide, as well as for general support contact information.

  • Page 8: Chapter 1, "Hardware Description

    About this guide This guide provides information about the jumpers and components of the NET+50 development board. The NET+50, part of the Digi NET+ARM line of SoC (System-on-Chip) products, supports any type of high bandwidth application in Intelligent Networked Devices.

  • Page 9: Customer Support

    Filenames, pathnames, and code examples. Related documentation For information about the chip you are using, see the NET+50 Hardware Reference. For information about third-party products and other components, review the documentation CD-ROM that came with your development kit.
  • Page 10 Contact information Technical support Telephone: 1 877 912-3444/ 1 952 912-3456 Fax: 1 952 912-4960 Documentation techpubs@digi.com Digi home page www.digi.com/support/eservice/eservicelogin.jsp Online problem reporting www.digi.com/problemreporting.jsp v i i i N E T + 5 0 J u m p e r s...

  • Page 11: Hardware Description

    Part number. 6127030 Test reference. S2NCCTP The NET+50 consists of a 208 plastic-quad-flat-pack (PQFP) package and a 208 ball- grid-array (BGA) package. A high-performance, highly-integrated 32-bit chip, the NET+50 is designed for use in intelligent network devices and Internet appliances.

  • Page 12: Features Of The Development Board

    Features of the development board The NET+Works development board provides these basic features: 44.3 MHz NET+50 (BGA). The NET+50 BGA development board supports applications using the NET+50 QFP processor. 18.432 MHz crystal, with option for external oscillator. ARM JTAG ICE port.

  • Page 13: Jumpers And Single Dip Switch Sw2

    H a r d w a r e D e s c r i p t i o n Chip select Peripheral Maximum size Flash 16 MB SDRAM 16 MB Expansion connector 256 KB Parallel EE (default) or expansion connector 32 KB (default) or 256 KB Expansion connector 256 KB...

  • Page 14: Connectors

    H a r d w a r e D e s c r i p t i o n Connectors This table defines the connectors and their designations: Reference number Type Purpose J1/J2 Mini/din jack Power connector - 5 pin din populated RJ45 MAG-jack 10/100 BT Ethernet with LEDs J4-8...

  • Page 15: Dip Switches

    H a r d w a r e D e s c r i p t i o n DIP switches A group of four 8-position DIP switches is provided for: Configuring the NET+ARM Selecting Write or Read enable Selecting MIC port: Either ENI/DPO or IEEE1284 or GPIO modes The tables in this section give details about each switch.

  • Page 16: Switch 3

    H a r d w a r e D e s c r i p t i o n Position Function 4 GEN_ID11 Normal Spare 5 GEN_ID12 Normal Parallel ports bit 0 6 GEN_ID13 Normal Parallel ports bit 1 7 GEN_ID14 Normal Force download mode 8 GEN_ID15...

  • Page 17: Expansion Plugs

    H a r d w a r e D e s c r i p t i o n Position Function LEND Normal Little Endian FWRITE Flash write disable Normal FRREAD Flash Read disable Normal Normal Spare (NC) Normal Spare (NC) Table 7: Switch 4 Expansion plugs The two 60-pin plugs bring out the entire NETARM system bus, including ports A:C.

  • Page 18: Ethernet Interface

    H a r d w a r e D e s c r i p t i o n Signal name Function RESET* Hardware reset input to NETARM PORTA7:0 Used on board (R57, 58, 59, 14, 143,34,26,25 isolates) PORTB7:0 Used on board (R29, 39, 31, 80, 16, 20, 17, 21 isolates) PORTC7, PORTC5 Used on board (R121 and R90 isolates) Table 8: P11 functions...

  • Page 19: Mic (Ieee1284, Gpio, And Eni Interfaces)

    H a r d w a r e D e s c r i p t i o n The RJ45 connector is integrated with the isolation transformer, EMI filter components, link, and receive LEDs. You also can use the MII interface to determine the current Ethernet link status. Change of link status can cause an interrupt on IRQ0*.

  • Page 20: Protype Breadboard Area

    H a r d w a r e D e s c r i p t i o n Protype breadboard area This area provides space for: 2 SIOC16 or SIOC14 ICs 4 SOT23-6, SOT23-5, SOT23-4... Discretes in the 1206 package Minidip 8 pin through hole IC GND connection points 3.3V connection points...

  • Page 21: Chapter 2 : S C H E M A T I C S

    Schematics his chapter provides the schematics for the NET+Works development board.
  • Page 22 44.2368MHz 2.5V CORE, PLL 3.3V CS3 PARALLEL EE, x8(2-32KB) SD CLK STANDARD = 8K x 8 NetSilicon - A Digi International Company PROTOTYPING AREA - (2)SIOC16, Title NET50/20M Dev. Brd. Block Diagram (4)SOT23-6, (8)1206, (1)MINIDIP-8, Size Document Number (5) MICTOR EMILATOR HEADERS - 38 PIN GND &...
  • Page 23 S c h e m a t i c s CONFIDENTIAL MATERIAL TO NetSilicon - A Digi International Company NOTES: 1. ALL RESISTOR VALUES ARE IN OHMS AND IN THE 0603 SIZE UNLESS OTHERWISE NOTED 2. ALL RESISTOR VALUES ARE 5% UNLESS OTHERWISE NOTED 3.
  • Page 24 All 8 bits go to Expansion Connector and can be disabled for off-board use. For NET+20M to NET+20UM migration only eight(8) of the sixteen(16) combined PORTB and PORTC pins should be used. NetSilicon - A Digi International Company, Waltham, MA Titl e NET+ARM 20M/50 Port & Chip Select Information Size...
  • Page 25 TRST BCLK SCANEN- Clock Buffer Req'd when using NETA50 with Addr. Buffers BCLK Add when using Ext. Oscillator VCCA1 VCCA2 NetSilicon - A Digi International Company, W altham, MA Title BEAD_1806 VCCA3 NET+ARM 20M/50 BGA & LEDs 3.3V 3.3V 3.3V...
  • Page 26 Mictor Emulator Headers FRESET- 10,11 MAX811S_SOT143 AMP #767054-1 Pin 44 = alignment .001 NetSilicon - A Digi International Company, W altham, MA hole; Pin 45-46 are for the optional SW_PB Title latch securing holes. NET+ARM 20M/50 Emulator Hdrs., Jtag, & Addr., Buffers...
  • Page 27 R139 16 OR 32 BIT AMD FLASH16V_TSOP48 COMPATIBLE FLASH. FLASH16V_TSOP48 RST- FLOE- FLWE- NetSilicon - A Digi International Company, W altham, MA Title NET+ARM 20M/50 Flash & EE Memory FLASH: x16 or x32 Size Document Number n20m50b05.SCH Date: Thur sday, September 05, 2002 Sheet w w w .
  • Page 28 BA23 added as an expansion card to P11-12. HDR3X8 HDR3X8 P5-6 16 BIT DRAM 32 BIT NetSilicon - A Digi International Company, W altham, MA Title NET+ARM 20M/50 SDram Memory Size Document Number n20m50b06.SCH Date: Thur sday, September 05, 2002...
  • Page 29 RIAA- RIA_SER_EE_CLK MAX3245_SSOP28 1.0K Remove This resistor If C6 is used for Serial EE CLK VCCSPA Add R33 for MAX3241 NetSilicon - A Digi International Company, W altham, MA Title NET+ARM 20M/50 Serial 1Mbps Size Document Number n20m50b07.SCH Date: Thursday, September 05, 2002 Sheet w w w .
  • Page 30 OPEN RS485_DO 100_1206 TOUTB 100_1206 TOUTA NetSilicon - A Digi International Company, Waltham, MA 1.0K Keeps RS485 transmitter "OFF" during power-up Titl e RS485 NET+ARM 20M/50 Serial 1Mbps or RS485 Port B(2) Used for Board ID. If RSTB* is used externally with MAX3491_SO14 R31 removed the 1K pull-down should be maintained.
  • Page 31 0, 1, [3.1 ns] 1, 0, [3.7 ns] GND_MTG Hole) 1, 1, [4.3 ns] FG 3 FG 4 GND_MTG GND_MTG NetSilicon - A Digi International Company, W altham, MA Title NET+ARM 20M/50 10/100BASETX Size Document Number n20m50b09.SCH Date: Thur sday, September 05, 2002 Sheet w w w .
  • Page 32 PCLKC1 ENI_CONN50 PBD13 PCLKC2 PBD14 PCLKC3 PBD15 PCLKC4 RISO L8_22_.8mm0402 NetSilicon - A Digi International Company, Waltham, MA Title NET+ARM 20M/50 ENI & GPIO Port Size Document Number n20m50b10.SCH Date: Thursday, September 05, 2002 Sheet N E T + 5 0...
  • Page 33 R108 NANOFLEX_60_M 5 ON=ENABLE FL ASH WRITE 6 ON=ENABLE FL ASH READ All inputs must be maintained at 3.3V Logic levels 3.3V NetSilicon - A Digi International Company, Waltham, MA Title NET+ARM 20M/50 Expansion & Dipswitches Size Document Number n20m50b11.SCH...

  • Page 34: Prototyping Area

    10uF_ELE_SM_LESR 2.5V BEAD FOR HEAT SINK. NETARM CORE CVDD MIC2940A_TO263 FILU29 CVDD 3.3V 2.5V NetSilicon - A Digi International Company, Waltham, MA 3.3V LDO_SOT23_5 G OUT Title 470pF 47uF_ELE_SM NET+ARM Power Supply, & Breadboard Area 2.5V SUPPLY Size Document Number n20m50b12.SCH...
  • Page 35 CS1- SDRAM CS- CS0- FL ASH Mem. TRST- TRST BCLK BCLK NetSilicon - A Digi International Company, Waltham, MA Title CVDD VCCA1 NETARM 50 PQFP VCCA2 3.3V PLACE A BYPASS CLOSE TO ALL NETARM POWER INPUT PAIRS:182-180, 28-27, 78-79, 130-131,...

  • Page 37: M A T E R I A L S

    NET+Works Development Board Bill of Materials his chapter provides the bill of materials (BOM) for the NET+Works NET+50 development board.

  • Page 38: Bom - Net+50 Development Board

    N E T + W o r k s D e v e l o p m e n t B o a r d B i l l o f M a t e r i a l s BOM — NET+50 development board This table provides information for each part in the PCBA NET+50 development board bill of materials (manufactured item 6151001):...
  • Page 39 Telcom TC1015-2.5VCT713 0133020 REGULATOR LDO 1.25A 3.3V National Semi LM3940IS-3.3 TO26 Conductor MICREL M1C2904A33BU 0137003 IC NET+50 BGA (ATMEL) NetSilicon 0137003 0143900 DIODE 1.5A RECTIFIER SOD-87 Phillips BYD17D w w w . d i g i . c o m...
  • Page 40 N E T + W o r k s D e v e l o p m e n t B o a r d B i l l o f M a t e r i a l s Ref desc Desc Mfg PN...
  • Page 41 N E T + W o r k s D e v e l o p m e n t B o a r d B i l l o f M a t e r i a l s Ref desc Desc Mfg PN...
  • Page 42 N E T + W o r k s D e v e l o p m e n t B o a r d B i l l o f M a t e r i a l s Ref desc Desc Mfg PN...
  • Page 43 N E T + W o r k s D e v e l o p m e n t B o a r d B i l l o f M a t e r i a l s Ref desc Desc Mfg PN...
  • Page 44 N E T + W o r k s D e v e l o p m e n t B o a r d B i l l o f M a t e r i a l s Ref desc Desc Mfg PN...
  • Page 45 N E T + W o r k s D e v e l o p m e n t B o a r d B i l l o f M a t e r i a l s Ref desc Desc Mfg PN...
  • Page 46 N E T + W o r k s D e v e l o p m e n t B o a r d B i l l o f M a t e r i a l s Ref desc Desc Mfg PN...
  • Page 47 Index ASYNC serial ports 2 features of the NET+Works development board 2 chip select configuration 2 internal registers, using to configure chip configuring select 2 chip selects 2 DIP switches 5 connectors and designations 4 crystal 2 JTAG ICE port 2 jumpers and designation 3 DIP switches, configuring 5 DRAM 2...
  • Page 48 selecting flash memory bank 5 I n d e x - 2...

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Net+20m

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