16 Ω load f = 1 kHz, 0 dB gain
4.12.2 MIC Interface
MICBIAS0
PMIC
4.12.3 Headset
Module integrated one way stereo headphone interface. Customers are advised to reserve ESD devices during the
design phase to prevent ESD damage.
The 139 pin of the module is the interrupt pin, through which the user can realize the insert and pull out detection
of the headset. Schematic diagram of headphone connection is as follows:
VIO18_PMU
MICBIAS1
HS-DET
R
EAR_MICP
HPH_L
PMIC
HPH_R
Module
GND
Note: the earphone seat in the figure is normally closed type. If the earphone seat used by the user is normally
open type, please modify the detection circuit and software according to the actual pin.
Table 14: Performance parameters of the headset
SIM5800_Hardware Design_V1.01
Smart Machine Smart Decision
Output power
THD
@Pout=20mW
@Pout=100mW
THD+N
@Pout=20mW
@Pout=100mW
MIC1P
differential
signal
& shielded by
MIC1N
Module
Figure 27: Reference citcuit of the MIC
125
139
7
100R
8
100R
9
33pF
470R
470R
Figure 28: Reference circuit of headset
SNR
Close to microphone
33pF
10pF
33pF
10pF
GND
33pF
10pF
470K
47K
BEAD
BEAD
BEAD
ESD
ESD ESD
33pF
36
118
-
90
-
-74
-70
-74
-70
ESD
MIC
ESD
ESD
2018-10-08
mW
dB(A)
dB
dB
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