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Related Manuals for Texas Instruments SLVP089
Summary of Contents for Texas Instruments SLVP089
- Page 1 SLVP089 Synchronous Buck Converter Evaluation Module User’s Guide 1998 Mixed-Signal Linear Products...
- Page 2 Printed in U.S.A. SLVU001A 07/98...
- Page 3 SLVP089 Synchronous Buck Converter Evaluation Module User’s Guide Literature Number: SLVU001A July 1998 Printed on Recycled Paper...
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Page 4: Important Notice
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. -
Page 5: Read This First
Related Documentation From Texas Instruments The following books describe the TL5001 and related support tools. To obtain a copy of any of these TI documents, call the Texas Instruments Literature Re- sponse Center at (800) 477–8924. When ordering, please identify the book by its title and literature number. - Page 6 Trademarks TI is a trademark of Texas Instruments Incorporated. World Wide Web: http://www.ti.com World Wide Web: http://www.ti.com/sc/docs/pic/home.htm Center (PIC) hotline: (972) 644–5580 Send a fax: (972) 480–7800...
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Page 7: Table Of Contents
Hardware ............... Introduction . - Page 8 Running Title—Attribute Reference Figures 1–1 Typical Synchronous Buck Converter 1–2 Schematic Diagram ............1–3 Input/Output Connections .
- Page 9 The SLVP089 Synchronous Buck Converter Evaluation Module (SLVP089) provides a method for evaluating the performance of the TL5001 pulse-width- modulation (PWM) controller. The device contains all of the circuitry necessary to control a switch-mode power supply in a voltage-mode configuration. This manual explains how to construct basic power conversion circuits including the design of the control chip functions and the basic loop.
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Page 10: Typical Synchronous Buck Converter
The SLVP089 evaluation module will supply a nominal 3.3-V output over a load range from 0 to 3 A using a dc input voltage of 5.5 V to 12 V. Full load efficiency... -
Page 11: Schematic Diagram
1.2 Schematic Figure 1–2. Schematic Diagram 5.5 V to 12 V 0.22 F V CC 121 k TL5001 COMP 0.033 1.6 k 0.0022 1.00 k 90.9 k Note: Frequency is set to 100 kHz by R9. See TL5001 data sheet for the curve of oscillator frequency versus timing resistance. 0.47 F 10 k IRF7406... -
Page 12: Input/Output Connections
Input/Output Connections 1.3 Input/Output Connections Figure 1–3 shows the input/output connections to the SLVP089. Figure 1–3. Input/Output Connections – TEXAS INSTRUMENTS SYNC. RECT BUCK Notes: 1) Source power should be able to supply a minimum of 2.5 A at 5.5-V input and/or 1.1-A at 12-V input. -
Page 13: Board Layout
1.4 Board Layout Figure 1–4 shows the SLVP089 board layout. Figure 1–4. Board Layout TEXAS INSTRUMENTS TL5001 +3.3V, 3 AMP SYNC. RECT BUCK JMP1 R4 R3 SLVP089 EVAL BOARD REV2 Board Layout Hardware... -
Page 14: Bill Of Materials
Bill of Materials 1.5 Bill of Materials Table 1–1 lists materials required for the SLVP089. Table 1–1. Bill of Materials Reference Part Number ECS-T1CY105R Standard C3225Y5V1C106Z Standard Standard Standard Standard C5, C7, TPSD107M010R0100 C10, C12 Standard Standard 30BQ015 CR2, CR3... -
Page 15: Test Results
1.6 Test Results Tables 1–2 and 1–3, along with Figures 1–5 through 1–8, show the test results for the SLVP089. Table 1–2. Line/Load Regulation, 3.3-V (Total Variation) Line/Load 0.3 A 0.9 A 5.5 V Vo(V) 3.330 3.329 6.0 V Vo(V) 3.330... -
Page 16: Power Switch Turn-On And Delay From Q2 Off
Test Results Figure 1–6. Power Switch Turn-On and Delay from Q2 Off V CC = 12 V I O = 1.5 A Q1 DRAIN 5 V/DIV Figure 1–7. Power Switch Turn-Off and Delay to Q2 On V CC = 12 V I O = 1.5 A Q2 Gate 5 V/Div... -
Page 17: Inductor And Output Ripple
Figure 1–8. Inductor and Output Ripple V CC = 12 V I O = 1.5 A Test Results Inductor Ripple 1 A/Div 1–DC Output Ripple 20 mV/Div 2–AC 2 s/Div Hardware... - Page 18 1-10...
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Page 19: Design Procedure
There are many possible ways to proceed when designing power supplies. This chapter shows the procedure used in the design of the SLVP089. The chapter includes the following topics: Topic .......... - Page 20 Introduction 2.1 Introduction The SLVP089 is a dc-dc synchronous buck converter module that provides a 3.3-V output at up to 3 A with an input voltage range of 5.5 V to 12 V. The PWM controller is a TL5001 operating at a nominal frequency of 100 kHz. The TL5001 is configured for a maximum duty cycle of 100 percent and has short- circuit protection built in.
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Page 21: Operating Specifications
2.2 Operating Specifications Table 2–1 lists the operating specifications for the SLVP089. Table 2–1. Operating Specifications Specification Input Voltage Range Output Voltage Range Output Current Range Operating Frequency Output Ripple Efficiency (V = 9 V, I = 3 A) Design Procedure... -
Page 22: Duty Cycle Estimate
Design Procedures 2.3 Design Procedures Detailed steps in the design of a buck-mode converter may be found in Designing With the TL5001C PWM Controller (literature number SLVA034) from TI. This section shows the basic steps involved in this design. 2.3.1 Duty Cycle Estimate The duty cycle for a continuous-mode step-down converter is approximately: –... -
Page 23: Synchronous Switch And Rectifier
The power dissipation (conduction + switching losses) can be approximated Assuming total switching time, t perature, and r The thermal impedance for Q1 R a one-inch-square pattern, thus: 2.3.4 Synchronous Switch and Rectifier The synchronous switch calculations follow the same path as the power switch except that the duty cycle is 1–D. -
Page 24: Controller Functions
Design Procedures 2.3.6 Controller Functions The controller functions, oscillator frequency, soft-start, dead-time-control, short-circuit protection, and sense-divider-network are discussed in this sec- tion. The oscillator frequency is set by selecting the resistance value from the graph in figure 6 of the TL5001 data sheet. For 100 kHz, a value of 90.9 k lected. -
Page 25: Power Stage Bode Plot
Calculating the pulse-width-modulator gain as the change in output voltage divided by the change in PWM input voltage gives: The LC filter has a double pole at: (worst case values) and rolls off at 40-dB per decade after that until the ESR zero is reached at: This information is enough to calculate the required compensation values. -
Page 26: Compensation Network
Design Procedures Figure 2–2. Compensation Network The transfer function for this circuit is: The desired output regulation is 6 percent total deviation. The PWM control- ler tolerance is 5 percent, and the divider resistors are 1 percent; therefore, the control loop must be very precise. A minimum dc gain of 1000 (60 dB) gives a 0.1 percent tolerance. -
Page 27: Bode Plot
Figure 2–3 shows the bode plot for the compensation network. Figure 2–3. Bode Plot Note from the output response shown in Figure 2–4 that the minimum phase margin is 40 degrees and the bandwidth is 18 kHz under nominal operating conditions. - Page 28 2-10...
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