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Related Documentation From Texas Instruments The following books describe the TL5001 and related support tools. To obtain a copy of any of these TI documents, call the Texas Instruments Literature Re- sponse Center at (800) 477–8924. When ordering, please identify the book by its title and literature number.
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Trademarks TI is a trademark of Texas Instruments Incorporated. World Wide Web: http://www.ti.com World Wide Web: http://www.ti.com/sc/docs/pic/home.htm Center (PIC) hotline: (972) 644–5580 Send a fax: (972) 480–7800...
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The SLVP089 Synchronous Buck Converter Evaluation Module (SLVP089) provides a method for evaluating the performance of the TL5001 pulse-width- modulation (PWM) controller. The device contains all of the circuitry necessary to control a switch-mode power supply in a voltage-mode configuration. This manual explains how to construct basic power conversion circuits including the design of the control chip functions and the basic loop.
The SLVP089 evaluation module will supply a nominal 3.3-V output over a load range from 0 to 3 A using a dc input voltage of 5.5 V to 12 V. Full load efficiency...
1.2 Schematic Figure 1–2. Schematic Diagram 5.5 V to 12 V 0.22 F V CC 121 k TL5001 COMP 0.033 1.6 k 0.0022 1.00 k 90.9 k Note: Frequency is set to 100 kHz by R9. See TL5001 data sheet for the curve of oscillator frequency versus timing resistance. 0.47 F 10 k IRF7406...
Input/Output Connections 1.3 Input/Output Connections Figure 1–3 shows the input/output connections to the SLVP089. Figure 1–3. Input/Output Connections – TEXAS INSTRUMENTS SYNC. RECT BUCK Notes: 1) Source power should be able to supply a minimum of 2.5 A at 5.5-V input and/or 1.1-A at 12-V input.
Bill of Materials 1.5 Bill of Materials Table 1–1 lists materials required for the SLVP089. Table 1–1. Bill of Materials Reference Part Number ECS-T1CY105R Standard C3225Y5V1C106Z Standard Standard Standard Standard C5, C7, TPSD107M010R0100 C10, C12 Standard Standard 30BQ015 CR2, CR3...
1.6 Test Results Tables 1–2 and 1–3, along with Figures 1–5 through 1–8, show the test results for the SLVP089. Table 1–2. Line/Load Regulation, 3.3-V (Total Variation) Line/Load 0.3 A 0.9 A 5.5 V Vo(V) 3.330 3.329 6.0 V Vo(V) 3.330...
Test Results Figure 1–6. Power Switch Turn-On and Delay from Q2 Off V CC = 12 V I O = 1.5 A Q1 DRAIN 5 V/DIV Figure 1–7. Power Switch Turn-Off and Delay to Q2 On V CC = 12 V I O = 1.5 A Q2 Gate 5 V/Div...
Figure 1–8. Inductor and Output Ripple V CC = 12 V I O = 1.5 A Test Results Inductor Ripple 1 A/Div 1–DC Output Ripple 20 mV/Div 2–AC 2 s/Div Hardware...
There are many possible ways to proceed when designing power supplies. This chapter shows the procedure used in the design of the SLVP089. The chapter includes the following topics: Topic ..........
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Introduction 2.1 Introduction The SLVP089 is a dc-dc synchronous buck converter module that provides a 3.3-V output at up to 3 A with an input voltage range of 5.5 V to 12 V. The PWM controller is a TL5001 operating at a nominal frequency of 100 kHz. The TL5001 is configured for a maximum duty cycle of 100 percent and has short- circuit protection built in.
2.2 Operating Specifications Table 2–1 lists the operating specifications for the SLVP089. Table 2–1. Operating Specifications Specification Input Voltage Range Output Voltage Range Output Current Range Operating Frequency Output Ripple Efficiency (V = 9 V, I = 3 A) Design Procedure...
Design Procedures 2.3 Design Procedures Detailed steps in the design of a buck-mode converter may be found in Designing With the TL5001C PWM Controller (literature number SLVA034) from TI. This section shows the basic steps involved in this design. 2.3.1 Duty Cycle Estimate The duty cycle for a continuous-mode step-down converter is approximately: –...
The power dissipation (conduction + switching losses) can be approximated Assuming total switching time, t perature, and r The thermal impedance for Q1 R a one-inch-square pattern, thus: 2.3.4 Synchronous Switch and Rectifier The synchronous switch calculations follow the same path as the power switch except that the duty cycle is 1–D.
Design Procedures 2.3.6 Controller Functions The controller functions, oscillator frequency, soft-start, dead-time-control, short-circuit protection, and sense-divider-network are discussed in this sec- tion. The oscillator frequency is set by selecting the resistance value from the graph in figure 6 of the TL5001 data sheet. For 100 kHz, a value of 90.9 k lected.
Calculating the pulse-width-modulator gain as the change in output voltage divided by the change in PWM input voltage gives: The LC filter has a double pole at: (worst case values) and rolls off at 40-dB per decade after that until the ESR zero is reached at: This information is enough to calculate the required compensation values.
Design Procedures Figure 2–2. Compensation Network The transfer function for this circuit is: The desired output regulation is 6 percent total deviation. The PWM control- ler tolerance is 5 percent, and the divider resistors are 1 percent; therefore, the control loop must be very precise. A minimum dc gain of 1000 (60 dB) gives a 0.1 percent tolerance.
Figure 2–3 shows the bode plot for the compensation network. Figure 2–3. Bode Plot Note from the output response shown in Figure 2–4 that the minimum phase margin is 40 degrees and the bandwidth is 18 kHz under nominal operating conditions.
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