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1
3. BLOCK DIAGRAM AND SCHEMATIC DIAGRAM
QQ
3.1 BLOCK DIAGRAM
3 7 63 1515 0
A
TRANSMITTER SECTION
A
DSP ASSY
JA81131
L
R
1
B
IC1602
L
NJM2115M
OP AMP
R
5
SW OUT
IC1501
BA09SFP
JA1501
V LED
9V REG.
DC IN
1
12V
C
TE
L 13942296513
RECEIVER SECTION
H
RX MODULE
D
14
AWD601RX
RF Rx Module
6
31
3
CLKIN
X3
24.576MHz
E
5
CLKOUT
U2
U20
FS2105RX
AIC1680
Freesystems Rx Chip
System Reset
3
7
RESETIN
54
58
www
6
U18
NC7SPU04
P5X
VCXO
2
4
F
X2
12.288MHz
12
1
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2
IC1151
IC1201
BU4052
AK5357VT
INPut Selector
A / D
9
InputB
12
X0
2
AINL
InputA
10
1
1
Y0
13
AINR
X
3
1
5
IC1632
BU4558
7
3
OP AMP
7
IC1502
NJM78M05DL1A
V+5A
5V REG.
1
3
V+5D
V+2.5V
V+9 VA+9SW
1
3
3
IC1503
NJM2391DL1-25
2.5V REG.
ANT2
U12
AIC1734-50CXA
5V REG.
D5V
2
U19
AIC1734-33CXA
17
3.3V REG.
A3V3
D3V3
RFANT2
U16
2
U17
NCP1117ST50T3
5V REG.
D5V
A5V
2
8 11
35
40
H6
52807-0910MOLEX
EEPROM Prog.
Interface
U11
EEPROM for FS
x
ao
5
VOUTL
7
y
2
DATA
3
8
VOUTR
.
i
U24
U28
NJM4558
PCM1742KE
DAC Filter
D/A Converter
2
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3
8
36.864MHz
13
RESET
9
25
SDT0
SDI0
NJU26150
DSP Chip
11
30
MCLK
MCK
31
BCKO
IC1601
PCM1754
32
LRO
D / A
3
SDO0
2
DATA
7
VoutL
16
SCK
8
VoutR
2
5
IC1631
PCM1754
D / A
2
DATA
7
VoutL
16
SCK
8
VoutR
KEY
Q Q
3
6 7
1 3
E
AMP-LED ASSY
RFSUPPLY+
3
TUNED
3
POWER
+9V
3
+9V
V+9RF
V+9
12
1
V+9
11
2
STATUS
10
10
u163
LOUT
7
8
5
ROUT
1
6
7
.
CN3
CN3701
(12P)
(12P)
XW-HT1
3
4
2 9
9 4
2 8
X1301
10
11
XI
X0
16
IC1303
PDL019A8
IC1301
4
EEPROM
Interface
SDO2
1
IC1661
PCM1754
D / A
2
DATA
16
SCK
7
4
8
10
11
12
47
46
43
44 45
RCON
9
SDOUT
1
6
IC1401
PDC118A
3
KEY1
CPU Chip
7
2
XRRESET
21
23
1 5
0 5
8
2 9
CN5902
(5P)
1
2
3
4
5
1
2
3
4
5
VD+9
CN5901
(5P)
Q5901
VA+9
8
m
IC3301
BA4558
OP AMP
co
3
1
X0
X (Lch)
3
1
5
7
Y0
Y (Rch)
5
7
4
9 9
VoutL
7
8
VoutR
Vol. Control
V+5D
17
RCON
18
X1401
10MHz
16
14
CN1471
(19P)
9 4
2 8
9 9
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