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Description:
The voltage regulators embedded in IOTA consists of seven sub blocks. Several low-dropout (LDO)
regulators perform linear voltage regulation. These regulators supply power to internal analog and
digital circuit, to DBB processor, and to external memory.
· LDO (VRDBB) is a programmable regulator that generates the supply voltages (1.8V,1.5V and
1.3V) for the core of the DBB processor. The main battery supplies VRDBB.
· LDO (VRIO) generates the supply voltage (2.8V) for the digital core and I/O of the TWL3025
device. The main battery supplies VRIO.
· LDO (VRMEM) is a programmable regulator that generates the supply voltages (2.8V and 1.8V) for
external memories (typically flash memories) and DBB memory interface I/O. The main battery
supplies VRMEM.
· LDO (VRRAM) is a programmable regulator that generate the supply voltages (2.8V and 1.8V) the
external memory (typically SRAM memories) and DBB memory interface I/Os. The main battery
supplies VRRAM.
· LDO (VRABB) generates the supply voltage (2.8V) for the analog functions of the TWL 3014
devices. The main battery supplies VRABB.
· LDO (VRSIM) is a programmable regulator that generates the supply voltages (2.9V and 1.8V) SIM
card and SIM card devices. The main battery supplies VRSIM.
· LDO (VRTC) is a programmable regulator that generates the supply voltage (1.8V.1.5Vand 1.3V)
for real time clock and the 32-KHZ oscillator located in the DBB device during all modes. The main
or backup battery supplies VRTC.
6.3.1
System power on/off Sequence
Power on mode
On the plug-in of the valid main battery or backup battery, an internal reset is generated (POR).
After a power-on sequence, the TWL3025 device is in the BACKUP or OFF state.
When these conditions occur in the power on state, the hardware power on sequence starts:
1. Enable band-gap (VREF and IREF)
Technical Documentation
TTD_Repair_L3 _Theory of Operation_E61_R1.0.pdf
Release 1.0
06/2006
Page 20 of 33
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