Serial Port Interface; Figure 7. Command And Data Word Timing - Cirrus Logic CS5530 Manual

2.2.3 Serial Port Interface

The CS5530's serial interface consists of four con-
trol lines: CS, SDI, SDO, SCLK. Figure 7 details
the command and data word timing.
CS, Chip Select, is the control line which enables
access to the serial port. If the CS pin is tied low,
the port can function as a three wire interface.
SDI, Serial Data In, is the data signal used to trans-
fer data to the converters.
SDO, Serial Data Out, is the data signal used to
transfer output data from the converters. The SDO
output will be held at high impedance any time CS
is at logic 1.
CS
SCLK
SDI
CS
SCLK
SDI
SDO
CS
SCLK
SDI
Command Time
8 SCLKs
SDO
* td is the time it takes the ADC to perform a conversion. See the Single
Conversion and Continuous Conversion sections of the data sheet for more
details about conversion timing.
16
MSB
Command Time
8 SCLKs
Command Time
8 SCLKs
MSB
t *
d

Figure 7. Command and Data Word Timing

SCLK, Serial Clock, is the serial bit-clock which
controls the shifting of data to or from the ADC's
serial port. The CS pin must be held low (logic 0)
before SCLK transitions can be recognized by the
port logic. To accommodate optoisolators SCLK is
designed with a Schmitt-trigger input to allow an
optoisolator with slower rise and fall times to di-
rectly drive the pin. Additionally, SDO is capable
of sinking or sourcing up to 5 mA to directly drive
an optoisolator LED. SDO will have less than a 400
mV loss in the drive voltage when sinking or sourc-
ing 5 mA.
Data Time 32 SCLKs
Write Cycle
Data Time 32 SCLKs
Read Cycle
MSB
8 SCLKs Clear SDO Flag
Data Conversion Cycle
MCLK /OWR
Clock Cycles
LSB
Data Time 32 SCLKs
CS5530
LSB
LSB
DS742F3