Expansion Feature Card Transmit Operation; Expansion Feature Card Receive Operation - IBM 5100 Maintenance Information Manual

(
(
(
(
(
Expansion Feature Card Transmit Operation
When the expansion feature card and the data set or I/O
device are ready to transmit, the card interrupt logic and
data rate clock are enabled. When an interrupt occurs at
a preselected rate (20 to 9,600.5 bps as specified by the
user), the communications I/O microprogram or serial
I/O input/output microprogram sends the next bit to be
transmitted to the card via '+bus out 0'; addresses the
card (DAB); and activates the '-put strobe' line to gate the
data bit to the card. The transmit operation occurs in the
following sequence:
1.
2.
3.
4.
5.
The fall of the data rate clock pulse on '-ungated
osc' sets the timer interrupt latch. The timer interrupt
latch sets '-irpt req' (interrupt request), which tells
the communications I/O microprogram or serial
I/O input/output microprogram that the card is ready
to transmit a bit of data.
The data bit to be transmitted is sent to the card on
'+bus out 0'.
The data bit and the rise of the data rate clock pulse
on '+ungated osc' sets the data bit in the transmit
buffer.
The bit is passed, via a driver circuit, to the '+com
xmit data' line going to the data set or to the '+SIO
xmit data' line going to the serial I/O device.
The timer interrupt latch is reset by the communi-
cations I/O microprogram or serial I/O input/output
microprogram, and the sequence begins again to
transmit the next bit.
The sequence continues until all bits for the character are
transmitted. After transmitting the last bit, the communi-
cations I/O microprogram or serial I/O input/output
microprogram disables the timer interrupt, but allows
the clock to run, until the program is ready to send another
character.
Expansion Feature Card Receive Operation
When the 5100 Portable Computer is in the receive state,
the '+com rcvd data' or '+SIO rcvd data' line is monitored
by the expansion feature card for a start bit (space level).
When a start bit is detected, the data rate clock is started
and a program level 1 interrupt is generated. (Refer to
the theory section of the IBM 5100 Maintenance Infor-
mation Manual for a description of a program level 1
interrupt.) This interrupt tells the communications I/O
microprogram or serial I/O input/output microprogram
that a bit has been received.
The microprogram in control addresses the card and acti-
vates the '-start execute bit' line (which samples the bit on
the '+rcvd data' line instantaneously) to gate the bit to the
communications I/O microprogram or serial I/O input/
output microprogram.
Line noise only affects the value of the bit if it occurs when
the bit is sampled. For example, if a noise pulse occurred
at the exact same time as the '-start execute bit' line is
activated (data bit is sampled), the noise pulse could be
detected as a bit. However, because this is an extra bit,
it could cause an error. (See Error Detection.)
The receive operation occurs in the following sequence:
1. The communications I/O microprogram or serial
I/O input/output microprogram enables the start bit
error detect logic. This logic monitors the '+com
rcvd data' or '+SIO rcvd data' line for a space signal
equal to at least one-half the bit time of the data
rate being used.
2. During communications operations, the data set
receives the start bit from the communications line
and sends the bit on the '+com rcvd data' line to the
5100. The serial I/O device sends the start bit on the
'+SIO rcvd data' line.
3.
4.
5.
6.
7.
The '+com rcvd data' or '+SIO rcvd data' line is gated
to 'bus in 7' and clock circuits. The start bit of each
character received starts the data rate clock that runs
until the complete character is received. Then the
communications I/O microprogram or serial I/O
input/output microprogram stops the clock and
enables the start bit error detect logic ('+bus out 7')
again.
The fall of the data rate clock pulse on '-ungated osc'
sets the timer interrupt latch and, during serial I/O
operation, latches the received data in the 'SIO data
buffer'.
The microprogram recognizes the interrupt, reads
the status latches, and resets the timer interrupt
latch.
The sequence of steps 4 through 6 continues until
the microprogram determines that all bits of the
character are received.
After all bits for the character are received, the clock
is turned off and the line is monitored for the next
start bit.
Theory Of Operation 2-17