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5.3 Trigger output
A trigger output pulse can be generated for external synchonization.
When the ADC card is ready to be triggered and a valid trigger signal occurs, a trigger output pulse is
generated. This signal is available on the front panel TRG OUT MMCX connector, and may be enabled
or disabled as required.
In idle state, Trigger Out signal is low. When a trigger is accepted a high level pulse occurs.
There are several trigger sources or signals which may be assigned to the trigger out connector (See
table below).
Trigger out sources
TriggerAccepted
TriggerAcceptedResync
TriggerCompare
HighLevel
LowLevel (default)
Table 5.3 - List of supported trigger out signals.
Trigger output signal behavior
By default, the trigger output is LowLevel.
If selecting a trigger output source, e.g. TriggerAcceptedResync or TriggerAccepted as trigger
output source, when the ADC card is ready to be triggered and a valid trigger signal occurs, a trigger
output pulse is generated.
Pulse duration
When using TriggerAcceptedResync, the signal is re-synchronized on a sub-multiple of the
sampling clock (78 MHz)).
The pulse duration is typically 384 ns.
When using TriggerAccepted, there is no resynchronization. The pulse duration is typically 384
±13 ns.
Selecting the trigger output source
The trigger output can be selected using following properties / attributes:
U5310A User's Manual
Description of signal
A pulse signal is sent directly to the Trigger Out.
A pulse signal resynchronized to a sub-multiple of sample clock is sent to
the Trigger Out.
The trigger input condition has been satisfied, but not necessarily
triggered, e.g. the trigger enable was not asserted.
Fixed high level signal for debug purposes.
Fixed low level signal for debug purposes.
5.3 Trigger output
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