JVC RX-DP10VBK Service Manual page 22

RX-DP10VBK/RX-DP10VSL
RX-DP10RSL
XCA56367PV150 (IC661, IC666) : DSP
1. Pin layout
SDO2/SDI3/SDO2_1/SDI3_1
SDO3/SDI2/SDO3_1/SDI2_1
2. Block diagram
1
DAX
TRIPLE
(SPDIFx.)
TIMER
INTERFACE
ADDRESS
GENERATION
UNIT
SIX CHANNELS
DMA UNIT
INTERNAL
DATA
BUS
PLL
CLOCK
GENARAT
EXTAL
RESET
PINIT/NMI
1-22
SCK/SCL 1
SS#/HA2 2
3
HREQ#
SDO0/SDO0_1 4
SDO1/SDO1_1 5
6
7
VCCS 8
GNDS 9
SDO4/SDI1 10
SDO5/SDI0 11
FST 12
FSR 13
SCKT 14
SCKR 15
HCKT 16
HCKR 17
VCCQL 18
GNDQ 19
VCCQH 20
HDS/HWR 21
HRW/HRD 22
HACK/HRRQ 23
HOREQ/HTRQ 24
VCCS 25
GNDS 26
ADO 27
28
ACI
TIO0 29
HCS/HA10 30
31
HA9/HA2
HA8/HA1 32
HAS/HA0 33
34
HAD7
HAD6 35
HAD5 36
2 16 8 4 6
HOST ESAI
INTERFACE INTERFACE
ESAI_1
PERIPHERAL
EXPANSION AREA
24-BIT
DSP56300
Core
PROGRAM PROGRAM
INTERRUPT DECODE
CONTROLLER CONTROLLE
MODA/IRQA
MODB/IRQB
MODC/IRQC
MODD/IRQD
5
MENORY EXPANTION AREA
PROGRAM
SHI
X MEMORY
RAM
INTERFACE
RAM
/INSTR
13K x 24
CACHE
ROM
3Kx24
32K x 24
Bootstrap
PM_EB
YAB
XAB
PAB
DAB
DDB
YDB
XDB
PDB
GDB
DATA ALU
PROGRAM
24 x 24 + 56->56-BIT MAC
ADDRESS
TWO 56-BIT ACCUMULATORS
GENERATOR
BARREL SHIFTER
24BITS BUS
108 D6
107 D5
106 D4
105 D3
104 GNDD
103 VCCD
102 D2
101 D1
100 D0
A17
99
98 A16
97 A15
GNDA
96
95 VCCQH
94 A14
A13
93
92 A12
91 VCCQL
90 GNDQ
89 A11
88 A10
87 GNDA
86 VCCA
85 A9
84 A8
83 A7
82 A6
81 GNDA
80 VCCA
79 A5
78 A4
77 A3
76 A2
75 GNDA
74 VCCA
73 A1
Y MEMORY
RAM
7K x 24
ROM
8K x 24
XM_EB YM_EB
EXTERNAL
18
ADDRESS
BUS
ADDRESS
SWITCH
DRAM &
SRAM BUS
10
INTERGACE
&
CONTROL
I-CACHE
24
EXTERNAL
DATA BUS
SWITCH DATA
POWER
MNGMNT
JTAG
OnCE
4