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APPLICATIONS INFORMATION
A reasonable starting point is to choose a ripple current
that is about 40% of I
OUT(MAX)
current occurs at the highest input voltage. To guarantee
that ripple current does not exceed a specified maximum,
the inductor should be chosen according to:
V
– V
V
IN
OUT
OUT
L ≥
•
f
•I
V
OSC
RIPPLE
IN
Inductor Core Selection
Once the inductance value is determined, the type of in-
ductor must be selected. Core loss is independent of core
size for a fixed inductor value, but it is very dependent on
inductance selected. As inductance increases, core losses
go down. Unfortunately, increased inductance requires
more turns of wire and therefore copper losses will in-
crease. Ferrite designs have very low core loss and are
preferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. Ferrite core material saturates "hard," which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequent output voltage
ripple. Do not allow the core to saturate!
Power MOSFET and Schottky Diode
(Optional) Selection
At least two external power MOSFETs need to be selected:
One N-channel MOSFET for the top (main) switch and one
or more N-channel MOSFET(s) for the bottom (synchro-
nous) switch. The number, type and on-resistance of all
MOSFETs selected take into account the voltage step-down
ratio as well as the actual position (main or synchronous)
in which the MOSFET will be used. A much smaller and
much lower input capacitance MOSFET should be used
for the top MOSFET in applications that have an output
voltage that is less than one-third of the input voltage. In
applications where V
>> V
IN
resistance is normally less important for overall efficiency
than its input capacitance at operating frequencies above
300kHz. MOSFET manufacturers have designed special
purpose devices that provide reasonably low on-resistance
with significantly reduced input capacitance for the main
switch application in switching regulators.
. Note that the largest ripple
, the top MOSFETs' on-
OUT
For more information
The peak-to-peak MOSFET gate drive levels are set by the
internal regulator voltage, V
logic-level threshold MOSFETs in most applications. Pay
close attention to the BVDSS specification for the MOSFETs
as well; many of the logic-level MOSFETs are limited to
30V or less. Selection criteria for the power MOSFETs
include the on-resistance, R
input voltage and maximum output current. MOSFET input
capacitance is a combination of several components but
can be taken from the typical gate charge curve included
on most data sheets (Figure 8). The curve is generated by
forcing a constant input current into the gate of a common
source, current source loaded stage and then plotting the
gate voltage versus time. The initial slope is the effect of the
gate-to-source and the gate-to-drain capacitance. The flat
portion of the curve is the result of the Miller multiplication
effect of the drain-to-gate capacitance as the drain drops the
voltage across the current source load. The upper sloping
line is due to the drain-to-gate accumulation capacitance
and the gate-to-source capacitance. The Miller charge (the
increase in coulombs on the horizontal axis from a to b
while the curve is flat) is specified for a given V
voltage, but can be adjusted for different V
multiplying the ratio of the application V
specified V
values. A way to estimate the C
DS
is to take the change in gate charge from points a and b
on a manufacturer's data sheet and divide by the stated
V
voltage specified. C
DS
selection criteria for determining the transition loss term
in the top MOSFET but is not directly specified on MOSFET
data sheets. C
and C
RSS
definitions of these parameters are not included. When the
controller is operating in continuous mode the duty cycles
for the top and bottom MOSFETs are given by:
MILLER EFFECT
V
GS
a
Q
IN
C
= (Q
– Q
MILLER
B
A
Figure 8. Gate Charge Characteristic
www.linear.com/LTC3875
LTC3875
, requiring the use of
INTVCC
, input capacitance,
DS(ON)
voltages by
DS
to the curve
DS
MILLER
is the most important
MILLER
are specified sometimes but
OS
V
b
+
+
–
V
GS
–
)/V
DS
3875 F08
drain
DS
term
V
IN
V
DS
3875fb
23
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