u-blox SARA-G3 Series System Integration Manual page 60

AT+UPSV=2: power saving enabled and controlled by the RTS line
This configuration can only be enabled with the module HW flow control disabled (AT&K0).
The UART interface is immediately disabled after the DTE sets the RTS line to OFF. Then, if a voice or
data call is not enabled, the module automatically enters idle-mode whenever possible according to any
other activity, and periodically wakes up from idle-mode to active-mode to monitor the paging channel of
the current base station (paging block reception).
Instead, the UART is disabled as long as the RTS line is set to OFF, also when the module is in
active-mode, to reduce power consumption. The UART is enabled in the following cases:
 During a call, the UART interface is kept enabled, regardless of the RTS line setting
 If the module must transmit some data over the UART (e.g. URC), the interface is temporarily
enabled even if the RTS line is set to OFF by the DTE

If the module receives a data over the UART, it causes the system wake-up: this is the "wake up
via data reception" feature described in the following subsection
When the DTE sets the RTS line to OFF, the timeout to enter idle-mode from the last data received at
the serial port during the active-mode is the one previously set with the AT+UPSV=1 configuration or it is
the default value.
If the RTS line is set to ON by the DTE the module is not allowed to enter idle-mode and the UART is
kept enabled until the RTS line is set to OFF.
When an OFF-to-ON transition occurs on the RTS input line, the UART is re-enabled and the module, if
it was in idle-mode, switches from idle to active-mode after ~20 ms: this is the UART and module
"wake up time".
Even if HW flow control is disabled, if the DTE sets the RTS line to OFF, the module sets the
CTS line accordingly to its power saving configuration as illustrated in
the AT+UPSV=1 case with HW flow control enabled.
Wake up via data reception
If the DTE transmits data when the UART is disabled (when power saving is configured), it is lost (not
correctly received by the module) in the following cases:
 +UPSV=1 with hardware flow control disabled

+UPSV=2 with hardware flow control disabled and RTS line set to OFF
When the module is in idle-mode, the TXD input line of the module is always configured to wake up the
UART and the module via data reception: when a low-to-high transition occurs on the TXD input line, it
causes the system wake-up. The UART is enabled and the module switches from idle-mode to active-
mode within ~20 ms from the first data reception: this is the system "wake up time". As a consequence,
the first character sent by the DTE when UART is disabled (i.e. the wake up character) is not a valid
communication character because it cannot be recognized, and the recognition of the subsequent characters
is guaranteed only after the complete system wake-up (i.e. after ~20 ms).
UBX-13000995 - R06
SARA-G3 series - System Integration Manual
Objective Specification
Figure 19Figure 19, like for
System description
Page 60 of 218