Table of Contents
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1
2
3
A
ab1
IIC CLK
ab2
IIC DATA
ab3
ab4
ab5
ab6
B
ab13
C901
R907
0.47
100
16V
1/2W
ab7
B:CHIP
D VCC
D.GND
C903
4.8
0.01
LOCK
X5
B:CHIP
R915
C902
4.7k
470
4.2
:CHIP
16V
ab9
IIC DATA
SDA
V.IN
4.5
ab8
IIC CLK
SCL
V.DIV
C
ab10
V.GND
H.IN
C905
C938
0.068
4.0
220
:PT
16V
V.OSC
H.PH.FI
C906
6.0
1.0
:MPS
V.AGC
AFC1
1
4.9
V SAW
V.SAW
REF
4.2
2
E/W
E/W
VCO.FI
4.9
D
ab11
V.SIN
V.SIN
R.F/V
6.1
D937
H.AGC
DELAY CAP
C913
HZS5.6NB2
0.1
:PT
3
V.DF
9V
4.7
5.2
H.DF
AFC2
0.7
4
H.FLY
H.OUT
0.4
H.GND
VCC
E
IC902
CXA8071CP
DEF CONTROL
ab12
V-REF
C937
0.47
16V
B:CHIP
F
G
ab14
ROTATION
bc2
D
-b
H
bc1
bc3
(DEFLECTION,CPU)
Divided circuit diagram
One sheet of D board circuit diagram is divided into four
sheets, each having the code D-a to D-d . For example, the
destination ab1 on the D-a sheet is connected to ab1 on the
D-b sheet.
a
b
1
Ref. No.
Circuit diagram division code
5-9
4
5
6
5.0
LOCK
2.7
C936
100p
ROTATION
CH:CHIP
1.9
H.CENT
D921
MA111
R951
5.0
X902
100
0.4
:CHIP
V-USYNC
0
5.0
DEGAUSS
D920
RB501V-40
4.7
D936
H-USYNC
HZS5.6NB2
3.6
C930
D902
0.01
HZU5.6B2TRF
:PT
4.9
12V
0.8
R922
V-REF
R932
10k
15k
4.8
:CHIP
10.2
:CHIP
4.8
R929
4.7k
2.4
:CHIP
R934
D918
10k
HZU5.6B2TRF
C922
C928
9.4
D919
1.0
0.01
MA111
B:CHIP
C927
C923
C916
0.01
470p
B:CHIP
22
CH:CHIP
HV
3.6
12V
C917
R931
V FLY
0.01
2.2k
C924
B:CHIP
4.2
:RN-CP
C921
22
C920
470
V-SYNC
0.01
16V
B:CHIP
5.0
5.5
D925
MA111
Q903
0
R933
D922
2SC2412
1k
1.2k
H AMP
:CHIP
4.8
0.4
D927
LOCK
MA111
C926
C925
470
5.0
0.01
D923
16V
B:CHIP
HEATER
0
:CHIP
10
C935
D926
0.47
16V
MA111
C918
10
B:CHIP
D924
MA111
H-USYNC
4.7
CSYNC
R594
R504
0.47
220
0.5
:FPRD
:CHIP
12
5.5
Q501
2SC2412
H DRIVE
5.5
5.5
Q502
2SA1037
H CENT
H DRIVE
C931
470p
CH:CHIP
D914
D916
MA111
MA111
bc8
bd2
bc4
bc5
bc6
bc7
bc9
bd1
bd3
bc10
7
8
9
IIC CLK
IIC DATA
STBY
5V
DA0
TEST
DA1
IR
5
4.8
DA2
RESET
RESET
D904
6
HZU5.6B2TRF
S0
DA3
PA0
D934
4.9
HZU5.6B2TRF
S1
DA4
PA1
D933
0.4
HZS5.6NB2
S2
DA5
PA2
D932
4.9
HZS5.6NB2
S3
DA6
PA3
D931
0.4
HZS5.6NB2
S4
DA7
PA4
0.4
DA8
PA5
LED RED
4.4
R954
10k
VSS2
PA6
LED GREEN
:CHIP
7
1.0
R953
10k
VDD2
CBLK
CBLANK
:CHIP
8
C914
R920
15p CH:CHIP
1k
PB7
OSCIN
:CHIP
D928
X901
2.2
HZU5.6B2TRF
24MHz
HZU5.6B2TRF
PB6
OSCOUT
2.4
C915
15p
PB5
CLKOUT
CH:CHIP
D930
HZU5.6B2TRF
PB4
NC
D929
4.0
HZU5.6B2TRF
PB3
NC
2.8
FB904
STBY
5V
:CHIP
PB2
NC
5.0
PB1
TDO
TXD
5.0
RXD
VFB
RDI
R909
9
4.2
2.2k
:CHIP
VSI1
SDA
IIC DATA
R908
4.1 4.7 5.0
2.2k
4.6
:CHIP
VSI2
SCL
IIC CLK
R957
1.6
47 :CHIP
CLP
DDCSDA
DDC DATA
R958
4.4
47 :CHIP
ITA
DDCSCL
DDC CLK
5.0
PD4
PC1
HOST GND
R927
0
0.7
:CHIP
IC904
PD3
HFB
R925
C909
C910
PST9143NL
470k
1000
4.7
14
:CHIP
:BP
RESET
10V
VSO
VDD
4.6
D917
C912
D911
MA111
100
MA111
HSO
HSI1
16V
NC
VCC
11
C908
CSI
VSS
SUB
0.01
B:CHIP
GND
OUT
D915
IC901
MA111
CXD9528S
13
4.8
CPU
D913
MA111
HV
H BLK
V-SYNC
H-SYNC
bc11
bc12
bc13
• D - b BOARD WAVEFORMS
1
2
3
2.6 Vp-p (V)
0.3 Vp-p (V)
1.0 Vp-p (V)
8
9
0
3.2 Vp-p (24MHz)
4.0 Vp-p (V)
5.0 Vp-p (V)
10
11
12
STBY
5V
1
D GND
2
+5V
R903
1k :CHIP
RXD
3
RXD
4
TXD
TXD
R904
CN901
1k
4P
:CHIP
WHT
D901
R917
R905
R916
:S-MICRO
15k
R906
MA111
0
15k
:CHIP
10k
:CHIP
:CHIP
1
DDCSCL
:CHIP
R921
0 :CHIP
2
DDCSDA
D905
R912
D906
1SS119
1k :CHIP
HOST GND1
3
MA111
R913
4
NC
100
:CHIP
ICC DATA
5
IICDATA
R914
6
GND
100
:CHIP
IIC CLK
7
IICCLK
8
HOST GND2
R923
D907
D908
0 :CHIP
9
HRTRC
MA111
MA111
10
VRTRC
R918
1k
:CHIP
CN902
10P
DDC CLK
D507
WHT
HZS5.1N
:S-MICRO
D910
HZU5.6B2TRF
D909
4
3
2
1
IC905
M24C08-MN6T
EEPROM
5
6
7
8
R901
JW(5)
CN903
C911
8P
0.01
WHT
:PT
R924
:S-MICRO
100
:CHIP
CBLANK
1
CBLANK
R935
2
INPUT SELECT
100
:CHIP
3
BPCLAMP
4
CSYNC
R938
100
5
VSYNC
:CHIP
R936
100
6
GND
:CHIP
7
HSYNC
R937
8
SYNC DET
100
:CHIP
TO A BOARD
CN309
V FLY
CSYNC
BPCLAMP
bc14
B-SS3497<J..>-D..-P2(24)
4
5
6
0.7 Vp-p (H)
5.0 Vp-p (H)
5.0 Vp-p (H)
!¡
!™
!£
5.0 Vp-p (H)
4.0 Vp-p (H)
5.0 Vp-p (H)
5-10
13
TO A BOARD
CN311
TO A BOARD
CN306
7
4.0 Vp-p (H)
!¢
4.6 Vp-p (H)
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