Sony STR-DN1050 Service Manual page 80

STR-DN1050
Pin No. Pin Name
108 AVSS
109 VSS
110 VURX
111 VUTX_VU_SDA
112 NO_USE
113 NO_USE
114 UPDATE_VURX
115 UPDATE_VUTX
116 NO_USE
117 NO_USE
118 NO_USE
119 HDMI_MUTE
120 NO_USE
121 APPLE_IIC_SCK
122 APPLE_IIC_SDA
123 V_COMP_SW2
124 PROG_VU_SCK
125 PROG_VUTX
126 PROG_VURX
127 V_SEL_SW2
128 APPLE_RST
129 VCC
130 V_SEL_SW1
131 V_MUTE
132 VSS
133 VCC
134 TRSTX (NC)
135 TCK
136 TDI
137 TMS
138 TDO
139 NO_USE
140 TEST7
141 TEST6
142 TEST5
143 TEST4
144 TEST3
145 TEST2
146 TEST1
147 UART_SEL
148 NO_USE
149 NO_USE
150 NO_USE
151 NO_USE
152 NO_USE
153 NO_USE
154 NO_USE
155 NO_USE
156 VCC
157 VSS
80
I/O
-
Ground terminal
-
Ground terminal
I
Communication data with MAIN Micom: Receive data
O
Communication data with MAIN Micom: Transmit data
O
Not used
O
Not used
I
Update to MAIN Micom data input (program main micom data pin)
O
Update to MAIN Micom data output (program main micom data pin)
O
Not used
O
Not used
O
Not used
O
HDMI: Audio Mute Request
O
Not used
O
APPLE IIC Clock
I/O
APPLE IIC Data
O
Component Video Select
I
Programming Clock (video micom)
I
Programming UART TX (video micom)
I
Programming UART RX (video micom)
O
Composite video output signal switch
O
APPLE IC Reset
-
Power supply pin (+3.3V)
O
Composite video output signal switch
O
Video muting control signal output to the video amplifi er
-
Ground terminal
-
Power supply pin (+3.3V)
Test Reset (JTAG). Resets the test state machine. TRST must be asserted (pulsed low) after
O
power-up or held low for proper operation of the processor.
Test Clock (JTAG). Provides a clock for JTAG boundary scan. TCK must be asserted (pulsed
O
low) after power-up or held low for proper operation of the device. (for designer evaluation
only)
Test Data Input (JTAG). Provides serial data for the boundary scan logic (for designer
O
evaluation only)
Test Mode Select (JTAG). Used to control the test state machine (for designer evaluation
O
only)
Test Data Output (JTAG). Serial scan output of the boundary scan path (for designer evaluation
O
only)
O
Not used
O
Test Pad 7 (for designer evaluation only)
O
Test Pad 6 (for designer evaluation only)
O Test Pad 5 (for designer evaluation only)
O
Test Pad 4 (for designer evaluation only)
O
Test Pad 3 (for designer evaluation only)
O
Test Pad 2 (for designer evaluation only)
O
Test Pad 1 (for designer evaluation only)
O
UART selector (Select video or network for back panel programming)
O
Not used
O
Not used
O
Not used
O
Not used
O
Not used
O
Not used
O
Not used
O
Not used
- Power supply pin (+3.3V)
-
Ground terminal
Description