Seiko Epson S1C17 Series Manual page 92

Cmos 16-bit single chip microcomputer.s1c17 core
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7 DETAILS OF INSTRUCTIONS
di
Function
Disable interrupts
Standard)
Extension 1) Unusable
Extension 2) Unusable
15 14 13 12 11 10
Code
0
0
0
|
|
IL
IE
C
Flag
|
|
0
Mode
CLK
One cycle
Description
(1) Standard
Resets the IE bit in the PSR to disable external maskable interrupts.
The reset interrupt, address misaligned interrupt, and NMI will be accepted even if the IE bit is
set to 0.
(2) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after a
branch instruction with the "d" bit.
Example
di
7-28
psr(IE) ← 0
9
8
7
6
|
0
0
0
0
0
0
1
|
|
|
|
|
|
V
Z
N
|
|
|
; Disables external maskable interrupts.
5
4
3
2
1
0
0
0
0
0
0
0
|
|
|
|
|
|
EPSON
S1C17 FAMILY S1C17 CORE MANUAL

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