Seiko Epson S1C17 Series Manual page 119

(3) Extension 2
ext
ext
ld
The addressing mode changes to register indirect addressing with displacement, so the 16 low-
order bits of the rs register are transferred to the address indicated by the content of the rb
register with the 24-bit immediate imm24 added. The content of the rb register is not altered.
(4) Address increment/decrement option
Specifying the []+, []-, or -[] option will automatically increment/decrement the memory
address. This allows the program to simply perform continuous data transfer.
ld
ld
ld
The address increment/decrement sizes are listed below.
When no ext is used (as in (1) shown above):
When one ext is used (as in (2) shown above): imm13
When two ext are used (as in (3) shown above): imm24
(5) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the "d" bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
Caution The rb register and the displacement must specify a 16-bit boundary address (least significant bit =
0). Specifying an odd address causes an address misaligned interrupt. Note, however, that the data
transfer is performed by setting the least significant bit of the address to 0.
S1C17 FAMILY S1C17 CORE MANUAL
imm13 ; imm13(10:0) = imm24(23:13)
imm13 ; = imm24(12:0)
[%rb],%rs ; memory address = rb + imm24
Load instruction with post-increment option
[%rb]+,%rs
The memory address will be incremented after the data transfer has
finished.
Load instruction with post-decrement option
[%rb]-,%rs
The memory address will be decremented after the data transfer has
finished.
Load instruction with pre-decrement option
-[%rb],%rs
The memory address will be decremented before starting the data
transfer.
2 (16-bit size)
EPSON
7 DETAILS OF INSTRUCTIONS
7-55