Add %Rd, Imm7 - Seiko Epson S1C17 Series Manual

Cmos 16-bit single chip microcomputer.s1c17 core
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add %rd, imm7

Function
16-bit addition
Standard)
Extension 1) rd(15:0) ← rd(15:0) + imm16, rd(23:16) ← 0
Extension 2) Unusable
15 14 13 12 11 10
Code
1
0
0
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IL
IE
C
Flag
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– ↔ ↔ ↔ ↔
|
Mode
Src:Immediate data (unsigned)
Dst:Register direct %rd = %r0 to %r7
CLK
One cycle
Description
(1) Standard
add
The 7-bit immediate imm7 is added to the rd register after being zero-extended. The operation is
performed in 16-bit size, and bits 23–16 of the rd register are set to 0.
(2) Extension 1
ext
add
The 16-bit immediate imm16 is added to the rd register. The operation is performed in 16-bit
size, and bits 23–16 of the rd register are set to 0.
(3) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the "d" bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
Example
(1) add
(2) ext
add
S1C17 FAMILY S1C17 CORE MANUAL
rd(15:0) ← rd(15:0) + imm7(zero extended), rd(23:16) ← 0
9
8
7
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0
0
0
r d
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V
Z
N
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; rd ← rd + imm7
%rd,imm7
imm13
; imm13(8:0) = imm16(15:7)
; rd ← rd + imm16, imm7 = imm16(6:0)
%rd,imm7
%r0,0x3f
; r0 = r0 + 0x3f
0x1ff
%r1,0x7f
; r1 = r1 + 0xffff
6
5
4
3
2
1
0
imm7
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EPSON
7 DETAILS OF INSTRUCTIONS
7-5

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