Table of Contents
Advertisement
PD3381A (DVDM ASSY : IC601)
• System Control CPU
•
Block Diagram
69
RES
79
WDTOVF
78
MD2
82
MD1
81
MD0
80
NMI
76
CK
71
EXTAL
73
XTAL
74
Vpp
77
Vcc
15
Vcc
43
Vcc
70
Vcc
75
Vcc
83
Vcc
84
Vcc
99
Vss
3
Vss
12
Vss
22
Vss
31
Vss
40
Vss
52
Vss
61
Vss
72
Vss
96
Vss
106
AVref
86
AVcc
85
AVss
91
Periphery address bus(24 bit)
Periphery data bus(16 bit)
Internal address bus(24 bit)
Internal upper data(16 bit)
Internal lower data(16 bit)
68
67
66 65 64 63 62 60 59 58 57 56 55 54 53
PORT A
64k PROM / MASK ROM
CPU
INTERRUPT
USER BREAK
CONTROLLER
CONTROLLER
SERIAL
COMMUNICATION
INTERFACE
(×2CHANNEL)
PROGRAMABLE
TIMING
PATTERN
CONTROLLER
PORT C
95 94 93 92 90 89 88 87
2
51 50 49 48 47 46 45 44 42 41
ADDRESS
4kB RAM1
DIRECT
MEMORY
ACCESS
CONTROLLER
BUS STATE
CONTROLLER
16BIT
INTEGRATED
TIMER PULSE UNIT
A/D
WATCHDOG
CONVERTER
TIMER
PORT B
112
111
110
109
108
107
105
104
103
102
1
39
38
37
36
35
34
33
32
30
29
28
27
26
25
24
23
21
20
19
18
17
16
14
13
11
10
9
8
7
6
5
4
101
100
98 97
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0(HBS)
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
23
Advertisement
Table of Contents
