Table of Contents
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SRM2B256SLMX70 (DVDM ASSY : IC502)
• 256 K SRAM (For Mechanism Control IC)
•
Block Diagram
•
Pin Function
N
. o
P
n i
N
a
m
e
1
A
1
4
2
A
1
2
3
A
7
4
A
6
5
A
5
A
d
d
e r
s s
6
A
4
7
A
3
8
A
2
9
A
1
1
0
A
0
1
1
/ I
O
1
1
2
/ I
O
2
D
a
a t
n i
1
3
/ I
O
3
1
4
V
S
S
G
N
D
0 (
A0
10
A1
9
A2
8
A3
7
9
A4
6
Decoder
A5
5
A6
4
A7
3
A8
25
A9
24
A10
21
A11
23
A12
2
6
A13
26
Decoder
A14
1
CS
Control
CS
20
Logic
OE
22
OE, WE
Control
Logic
WE
27
14 18
F
u
n
t c
o i
n
n i
p
t u
p
t u
o /
u
p t
t u
) V
Memory-Cell
Line
Array
512
512×64×8
64×8
64
Row
Row Gate
8
I/O Buffer
11
12
13 15 16 17 18 19
N
. o
P
n i
N
a
m
e
1
5
/ I
O
4
1
6
/ I
O
5
1
7
/ I
O
6
1
8
/ I
O
7
1
9
/ I
O
8
2
0
C
S
2
1
A
1
0
2
2
O
E
2
3
A
1
1
2
4
A
9
2
5
A
8
2
6
A
1
3
2
7
W
E
2
8
V
D
D
F
u
n
t c
o i
n
D
a
a t
n i
p
t u
o /
u
p t
t u
C
h
p i
s
e
e l
t c
A
d
d
e r
s s
n i
p
t u
O
u
p t
t u
e
n
a
b
e l
A
d
d
e r
s s
n i
p
t u
W
i r
e t
e
n
a
b
e l
P
o
w
r e
s
u
p
p
y l
2 (
7 .
o t
5
5 .
) V
21
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