Voltage Regulator; Field Alignment Procedure - RF Technology Eclipse Series Operation And Maintenance Manual

5 CIRCUIT DESCRIPTION

5.12 Voltage Regulator

The program is stored in U5, a CMOS EPROM. U4 is an address latch for the low order
address bits. U2 is used to read the channel select lines onto the data bus. U11 is an address
decoder for U5 and U2. U3 is a supervisory chip which keeps the processor reset unless the
+5 Volt supply is within operating limits. U1 translates the asynchronous serial port data to
standard RS232 levels.
The analogue to digital converter is used to measure the forward and reverse power, tuning
voltage and dc supply voltage.
If the processor detects that the PTT_WIRE_OR signal is asserted low, it will attempts to key
the exciter up. If will first attempt to key the VCO through Q10, and if the LD pin goes high,
it will switch the 9.2 Volt transmit line through Q14 and Q16. asserting Q16 has the effect of
also asserting the yellow Tx LED (D12) on the front panel, enabling the local 25W power
amplifier, and causing the T/R Relay output to be pulled low. D24 is 30 volt zener which
protects Q25 from both excessive voltages or reverse voltages.
Should there be a problem with either the tuning volts, or the battery voltage, the VCO
locking, the forward power, or the reverse power, the microprocessor will assert the ALARM
LED, through Q1. Depending on the setting of Jumper JP19, the ALARM signal can be
brought out on pin 7 of P3.
5.12 Voltage Regulator
The dc input voltage is regulated down to 9.4 Vdc by a discrete regulator circuit. The series
pass transistor Q23 is driven by error amplifiers Q8 and Q18. Q9 is used to start up the
regulator and once the circuit turns on, it plays no further part in the operation.
The +5 Volt supply for the logic circuits is provided by an integrated circuit regulator U14
which is run from the regulated 9.4 Volt supply.
Jumper JP18 is not normally fitted to the board, and is bridged with a 12mil track on the
component side of the board. It is provided so that the 9.4V load can be isolated from the
supply by the service department to aid in fault finding.
Jumpers JP20 and JP21 are also not normally fitted on the board, and are usually bridged with
a 12mil track on the component side. They allow U14 to be isolated from its input, or its
output or both.
6 Field Alignment Pr ocedur e
The procedures given below may be used to align the transmitter in the field. Normally,
alignment is only required when changing operating frequencies, or after component
replacement.
The procedures below do not constitute an exhaustive test or a complete alignment of the
module, but if successfully carried out are adequate in most circumstances.
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RF Technology T800 Page 17