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Hardware Integration Guide
Figure 19.
PCM Codec to AR Device Timing Diagram (Primary PCM)
Figure 20.
AR Device to PCM Codec Timing Diagram (Primary PCM)
6.15.2.1.3.
The table and drawings below illustrate the timing of the PCM signals when the AirPrime AR7558
module is operating in Auxiliary PCM mode.
Table 61.
Auxiliary PCM Timing
Parameter
Description
T(auxsync)
PCM_FS cycle time
T(auxsynch)
PCM_FS high time
T(auxsyncl)
PCM_FS low time
T(auxclk)
PCM_CLK cycle time
T(auxclkh)
PCM_CLK high time
T(auxclkl)
PCM_CLK low time
T(suauxsync)
PCM_FS setup time high before falling edge of PCM_CLK
T(hauxsync)
PCM_FS Hold time after falling edge of PCM_CLK
T(sudin)
PCM_DIN setup time before falling edge of PCM_CLK
T(hauxdin)
PCM_DIN hold time after falling edge of PCM_CLK
T(pauxdout)
Delay from PCM_CLK rising to PCM_DOUT valid
4116922
Auxiliary PCM Timing
Rev 1.1
Baseband Specification
Min
Typ
Max
-
125
-
62.4
62.5
-
62.4
62.5
-
-
7.8
-
3.8
3.9
-
3.8
3.9
-
1.95
-
-
1.95
-
-
70
-
-
20
-
-
-
-
50
January 21, 2015
unit
µs
µs
µs
µs
µs
µs
ns
ns
ns
ns
ns
44
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