Figure 4-5. Timing I/O Circuitry Block Diagram; Figure 4-6. Counter Block Diagram - National Instruments Corporation DAQCard-500 User Manual

Chapter 4
CTR RD/WR
Data
The MSM82C54 contains three independent 16-bit counter/timers and one 8-bit Mode Register.
As shown in Figure 4-5, counter 0 is used for data acquisition timing, and counters 1 and 2 are
free for general use. All three counter/timers can be programmed to operate in several useful
timing modes. The programming and operation of the MSM82C54 is presented in detail in the
optional DAQCard-500 Register-Level Programmer Manual.
The MSM82C54 for counter 0 uses a 1 MHz clock generated from the onboard oscillator. This
1 MHz clock is also available on the cable I/O connector, which can be used as a timebase for
counters 1 and 2. The 16-bit counters in the MSM82C54 can be diagrammed as shown in
Figure 4-6.
© National Instruments Corporation
OUT0
GATE0
CLK0
CLK1
GATE1
OUT1
8
CLK2
/
GATE2
OUT2
MSM82C54
Counter/Timer

Figure 4-5. Timing I/O Circuitry Block Diagram

CLK
GATE

Figure 4-6. Counter Block Diagram

A/D Conversion Logic
Vcc
Vcc
Interrupt
Interface
Counter OUT
4-7
Theory of Operation
1MHz
1 MHz
Clock
CLK1
OUT1
CLK2
GATE2
OUT2
DAQCard-500 User Manual