Timing Connections; Data Acquisition Counter And Timing Connections; General-Purpose Counter And Timing Signal Connections; Figure 3-4. Extconv* Signal Timing - National Instruments Corporation DAQCard-500 User Manual

Multifunction i/o card for type ii pcmcia bus

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Chapter 3

Timing Connections

Pins 20 through 26 and pin 11 of the I/O connector are for timing I/O signals. The

DAQCard-500 uses an MSM82C54 counter/timer integrated circuit. Counters 1 and 2 are

available at the I/O connector. Counter 0 is dedicated for data acquisition timing. Pin 11 carries

an external signal, EXTCONV*, that can be used for data acquisition timing in place of counter

0 of the MSM82C54. This signal is explained in the Data Acquisition Counter and Timing

Connections section of this chapter. Pin 20 carries the 1 MHz square-wave oscillator signal.

This signal can be used as a timebase for the counter clock inputs. Pins 22 through 26 carry

general-purpose timing signals from the MSM82C54. These signals are explained under

General-Purpose Counter and Timing Signal Connections later in this chapter.

Counter 0 on the MSM82C54 counter/timer is used as a sample-interval counter in timed A/D

conversions. In addition to counter 0, you can use pin 11, EXTCONV*, to externally time

conversions. If you need to program this chip directly, refer to the optional DAQCard-500

Figure 3-4 shows the timing requirements for the EXTCONV* input. An A/D conversion is

initiated by a rising edge on the EXTCONV*. The data from this conversion is latched into the

FIFO memory within 20 µs. The EXTCONV* input is a TTL-compatible signal.

EXTCONV*

V IH

V IL

Notice that EXTCONV* can only cause conversions to occur; you cannot use it as a monitor to

detect conversions caused by the onboard sample-interval timer.

The general-purpose timing signals include CLK and OUT signals for counter 1 and GATE,

CLK, and OUT signals for counter 2 of the MSM82C54. Counter 0 is not available on the I/O

connector. You can use the MSM82C54 counter/timers for general-purpose applications such as

pulse and square wave measurement. For these applications, CLK and GATE signals are sent to

the counters and the counters are programmed for various operations. The only exceptions are

counter 0, which has an internal 1 MHz clock and its gate is always enabled, and counter 1,

which has its gate always enabled.

t int

A/D Conversion Starts Here

3-7

t w

t w 200 ns Minimum

t int 20 µs Minimum

Signal Connections

(A/D interval)

DAQCard-500 User Manual

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