Writing The Interrupt Service Handler - Allen-Bradley 1784-KTX Reference Manual

Chapter 3
Programming Overview
Writing the
Interrupt Service Handler
#define LowPICPort 0x20
#define HighPICPort 0xA0
#define EOI 0x20
#define INT_PENDING_BIT 0x01
extern KTX_DUALPORT far *dp;
extern unsigned int InterruptNumber;
void interrupt InterruptServiceRoutine(void)
{
UBYTE temp;
/*============================================================================
**
** Verify it was the KTX that caused the interrupt by reading the
** status register.
**
==============================================================================*/
/**** Bit 0 of status reg == 1 when KTX ****/
/**** is the source of a host interrupt ****/
if (!(dp–>status_reg & 1))
return;
/**** Clear bit 0 of the status reg by ****/
/**** writing to acknowledge register. ****/
dp–>host_ack_of_ktx_int_reg = ACKNOWLEDGE_KTX;
/*============================================================================
**
** Service the COS interrupt first, since it can happen most often...
** 1) make sure it's enabled
** 2) if so, see if we got a COS interrupt
** 3) if so, acknowledge it and check for COS overrun
**
==============================================================================*/
3-6
The code fragment in Example 3.B is an example of an interrupt service
routine for the 1784-KTx.
Important: This example routine does not do any data handling; it is just
intended to serve as a skeleton to build on.
First, the least significant bit of the status register is checked to see if the
KTx generated an interrupt. If it did, then the data fields are checked to see
what type of interrupt it was and what to do about it. The host then writes a
1 to the host_ack_of_ktx_int_reg register to clear the least significant bit of
the status register. Before exiting the routine, an end-of-interrupt must be
issued to the first PIC, and also to the second PIC if the interrupt is on the
second PIC (greater than 7).
Example 3.B

Writing the interrupt service handler

/* Port address for Prog. Interrupt Controller for ints 0–7 */
/* Port address for Prog. Interrupt Controller for ints 8–15 */
/* End Of Interrupt to PIC */
/* bit mask for interrupt pending bit in status register */
/* pointer to KTX's dualport */
/* Global interrupt number for testing for second PIC */