Texas Instruments TRF7960 Manual page 31

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5.3.3 Status Registers
Displays the cause of IRQ and TX/RX status
Register default is set to 0x00 at POR = H or EN = L, and at each write to the ISO control register. It is also automatically reset at the end
of a read phase. The reset also removes the IRQ flag.
Bit Bit Name Function
B7 Irq_tx IRQ set due to end of TX
B6 Irg_srx IRQ set due to RX start
Signals the FIFO is 1/3 > FIFO >
B5 Irq_fifo
2/3
B4 Irq_err1 CRC error
B3 Irq_err2 Parity error
B2 Irq_err3 Byte framing or EOF error
B1 Irq_col Collision error
B0 Irq_noresp No-response interrupt
Table 5-23. Collision Position and Interrupt Mask Register (0Dh)
Register default is set to 3E at POR = H and EN = L. Collision bits reset automatically after read operation.
Bit Bit Name Function
B7 Col9 Bit position of collision MSB
B6 Col8 Bit position of collision
B5 En_irq_fifo Interrupt enable for FIFO
B4 En_irq_err1 Interrupt enable for CRC
B3 En_irq_err2 Interrupt enable for Parity
B2 En_irq_err3 Interrupt enable for Framing
error or EOF
B1 En_irq_col Interrupt enable for collision
error
B0 En_irq_noresp Enables no-response interrupt
Displays the bit position of collision or error
Register default is set to 0x00 at POR = H and EN = L. Automatically reset after read operation.
Bit Bit Name Function
B7 Col7 Bit position of collision MSB
B6 Col6
B5 Col5
B4 Col4
B3 Col3
B2 Col2
B1 Col1
B0 Col0 Bit position of collision LSB
Copyright © 2006–2010, Texas Instruments Incorporated
Table 5-22. IRQ Status Register (0Ch)
Comments
Signals that TX is in progress. The flag is set at the start of TX but the
interrupt request is sent when TX is finished.
Signals that RX SOF was received and RX is in progress. The flag is set at
the start of RX but the interrupt request is sent when RX is finished.
Signals FIFO high or low (less than 4 or more than 8)
Indicates receive CRC error
Indicates parity error
Indicates framing error
For ISO14443A and ISO15693 single sub-carrier
Signal to MCU that next slot command can be sent
Comments
Supported: ISO15693, single sub-carrier, and ISO14443A
Table 5-24. Collision Position (0Eh)
Comments
Supported is ISO15693, single sub-carrier, and ISO14443A
In other protocols, it shows the bit position of error, either frame, SOF-EOF,
parity, or CRC error.
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SLOU186F – AUGUST 2006 – REVISED AUGUST 2010
System Description
TRF7960
TRF7961
31