Texas Instruments TRF7960 Manual page 23

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Analog Front End (AFE)
ISO Encoder/Decoders
14443A
Packetization/Framing
Mode 2: Full ISO With Framing and Error Checking (Typical Mode)
5.2.5 Register Preset
After power-up and the EN pin low-to-high transition, the reader is in the default mode. The default
configuration is ISO15693, single sub-carrier, high data rate, 1-out-of-4 operation. The low-level option
registers (02...0B) are automatically set to adapt the circuitry optimally to the appropriate protocol
parameters.
When entering another protocol (writing to the ISO control register 01), the low-level option registers
(02...0B) are automatically configured to the new protocol parameters.
After selecting the protocol, it is possible to change some low-level register contents if needed. However,
changing to another protocol and then back, reloads the default settings, and the user must reload the
custom settings.
The Clo1 and Clo0 (register 09) bits, which define the microcontroller frequency available on the
SYS_CLK pin, are the only two bits in the configuration registers that are not cleared during protocol
selection.
Copyright © 2006–2010, Texas Instruments Incorporated
14443B 15693
Figure 5-4. User-Configurable Modes
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SLOU186F – AUGUST 2006 – REVISED AUGUST 2010
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TRF7960
TRF7961
Mode 0:
Raw, Sub-Carrier Data
Mode 1:
Un-Framed Raw ISO
Formatted Data
System Description 23