Texas Instruments TRF7960 Manual
Texas Instruments TRF7960 Manual

Texas Instruments TRF7960 Manual

Multi-standart fully integrated 13.56-mhz rfid analog front end and data-framing reader system
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MULTI-STANDARD FULLY INTEGRATED 13.56-MHZ RFID
ANALOG FRONT END AND DATA-FRAMING READER SYSTEM

1 Introduction

1.1

Features

12
• Completely Integrated Protocol Handling
• Separate Internal High-PSRR Power Supplies
for Analog, Digital, and PA Sections Provide
Noise Isolation for Superior Read Range and
Reliability
• Dual Receiver Inputs With AM and PM
Demodulation to Minimize Communication
Holes
• Receiver AM and PM RSSI
• Reader-to-Reader Anti-Collision
• High Integration Reduces Total BOM and Board
Area
– Single External 13.56-MHz Crystal Oscillator
– MCU-Selectable Clock-Frequency Output of
RF, RF/2, or RF/4
– Adjustable 20-mA, High-PSRR LDO for
Powering External MCU
• Easy to Use With High Flexibility
– Auto-Configured Default Modes for Each
Supported ISO Protocol
– 12 User-Programmable Registers
– Selectable Receiver Gain and AGC
– Programmable Output Power
(100 mW or 200 mW)
– Adjustable ASK Modulation Range
(8% to 30%)
– Built-In Receiver Band-Pass Filter With
User-Selectable Corner Frequencies
• Wide Operating Voltage Range of 2.7 V to 5.5 V
• Ultra-Low-Power Modes
– Power Down < 1 μA
– Standby 120 μA
– Active (Rx only) 10 mA
1.3

Description

The TRF7960/61 is an integrated analog front end and data-framing system for a 13.56-MHz RFID reader
system. Built-in programming options make it suitable for a wide range of applications for proximity and
vicinity RFID systems.
The reader is configured by selecting the desired protocol in the control registers. Direct access to all
control registers allows fine tuning of various reader parameters as needed.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Tag-it is a trademark of Texas Instruments Incorporated.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Check for Samples: TRF7960,
• Parallel 8-Bit or Serial 4-Pin SPI Interface With
MCU Using 12-Byte FIFO
• Ultra-Small 32-Pin QFN Package
(5 mm × 5 mm)
• Available Tools
– Reference Design/EVM With Development
– Source Code Available for MSP430
1.2
Secure Access Control
Product Authentication
– Printer Ink Cartridges
– Blood Glucose Monitors
Contactless Payment Systems
Medical Systems
SLOU186F – AUGUST 2006 – REVISED AUGUST 2010
TRF7961
Software

APPLICATIONS

Copyright © 2006–2010, Texas Instruments Incorporated
TRF7960
TRF7961

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Summary of Contents for Texas Instruments TRF7960

  • Page 1: Introduction

    – Active (Rx only) 10 mA Description The TRF7960/61 is an integrated analog front end and data-framing system for a 13.56-MHz RFID reader system. Built-in programming options make it suitable for a wide range of applications for proximity and vicinity RFID systems.
  • Page 2 Table 1-1. PRODUCT SELECTION TABLE PROTOCOLS DEVICE ISO14443A/B ISO15693 Tag-it™ ISO18000-3 106 kbps 212 kbps 424 kbps 848 kbps √ √ √ √ √ √ TRF7960 TRF7961 √ √ Introduction Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 3: Table Of Contents

    Reader Communication Interface ABSOLUTE MAXIMUM RATINGS ....Parallel Interface Communication ....DISSIPATION RATINGS TABLE ....Serial Interface Communication ..RECOMMENDED OPERATING CONDITIONS ....External Power Amplifier Application Contents Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 4: Description (Continued)

    MCU via a 12-byte FIFO register and MCU interface. The framing supports ISO14443 and ISO15693 protocols. The TRF7960/61 supports data communication levels from 1.8 V to 5.5 V for the MCU I/O interface, while also providing a data synchronization clock. An auxiliary 20-mA regulator (pin 32) is available for additional system circuits.
  • Page 5: Physical Characteristics

    I/O pin for parallel communication I/O_3 I/O pin for parallel communication I/O_4 I/O pin for parallel communication (1) SUP = Supply, INP = Input, BID = Bi-directional, OUT = Output Physical Characteristics Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 6: Packaging/Ordering Information

    (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. (2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package Physical Characteristics Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 7: Electrical Specifications

    RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) UNIT Supply voltage –40 °C Operating virtual junction temperature range Operating ambient temperature range –40 °C ELECTRICAL SPECIFICATIONS Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 8: Slou186F - August 2006 - Revised August 2010

    Output resistance I/O_0 to I/O_7 low_io = H for VDD_I/O < 2.7 V Ω Output resistance SYS_CLK low_io = H for VDD_I/O < 2.7 V Ω SYS_CLK ELECTRICAL SPECIFICATIONS Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 9: Application Schematic For The Trf796X Evm (Parallel Mode)

    TRF7960 TRF7961 www.ti.com SLOU186F – AUGUST 2006 – REVISED AUGUST 2010 Application Schematic for the TRF796x EVM (Parallel Mode) ELECTRICAL SPECIFICATIONS Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 10: Application Schematic For The Trf796X Evm (Spi Mode)

    TRF7960 TRF7961 SLOU186F – AUGUST 2006 – REVISED AUGUST 2010 www.ti.com Application Schematic for the TRF796x EVM (SPI Mode) ELECTRICAL SPECIFICATIONS Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 11: System Description

    (pin 7). SS_RX 5.1.2 Digital I/O Interface To allow compatible I/O signal levels, the TRF7960/61 has a separate supply input V (pin 16), with DD_I/O an input voltage range of 1.8 V to 5.5 V. This pin is used to supply the I/O interface pins (I/O_0 to I/O_7), IRQ, SYS_CLK, and DATA_CLK pins of the reader.
  • Page 12 = 2.8 V, V , and V = 2.8 V DD_RF DD_A DD_X = 2.7 V, V , and V = 2.7 V DD_RF DD_A DD_X System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 13 This option can be used to wake the reader system from complete power down by using a push-button switch or by sending a single pulse. System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com:...
  • Page 14 Transmitter active – full-power mode During reader inactivity, the TRF7960/61 can be placed in power down-mode (EN = 0). The power down can be complete (EN = 0, EN2 = 0) with no function running, or partial (EN = 0, EN2 = 1) where the...
  • Page 15 Figure 5-1. Power Up [V (Blue) to Crystal Start (Red)] CHIP ENABLE TO CLOCK START C002 Figure 5-2. EN2 Low and EN High (Blue) to Start of System Clock (Red) System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 16 SLOU186F – AUGUST 2006 – REVISED AUGUST 2010 www.ti.com CHIP ENABLE TO CLOCK START C003 Figure 5-3. EN2 High and EN Low (Blue) to Start of System Clock (Red) System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 17: Receiver - Analog Section

    Receiver – Analog Section The TRF7960/61 has two receiver inputs, RX_IN1 (pin 8) and RX_IN2 (pin 9). The two inputs are connected to an external filter to ensure that AM modulation from the tag is available on at least one of the two inputs.
  • Page 18 The source condition of the interrupt-request pulse is available in the IRQ and status register (address 0C). The bit-coding description of this register is given in Table 5-22. System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 19 Mode of operation Fundamental Type of resonance Parallel Frequency tolerance ±20 ppm Aging < 5 ppm/year Operation temperature range –40°C to 85°C Equivalent series resistance 50 Ω, minimum System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 20 FIFO has already been transmitted by sending an interrupt request with a flag in the IRQ register signaling FIFO low/high status. The external system should respond by loading the next data packet into the FIFO. System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 21 590 ns and the range of this counter is from 590 ns to 9.7 ms. The bit definitions (trigger conditions) are shown in Table 5-14. System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 22 In mode 2, data is ISO-standard formatted. SOF, EOF, and error checking are removed, so the microprocessor receives only bytes of raw data via a 12-byte FIFO. System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 23 The Clo1 and Clo0 (register 09) bits, which define the microcontroller frequency available on the SYS_CLK pin, are the only two bits in the configuration registers that are not cleared during protocol selection. System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 24: Register Descriptions

    Collision position and interrupt mask register Collision position RSSI levels and oscillator status FIFO Registers FIFO status TX length byte1 TX length byte2 FIFO I/O register System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 25 5 V (4.3 V – 5 V), or 3 V (2.7 V – 3.4 vrs5_3 1 = 5 V operation (V Selects the V DD_RF 0 = 3 V operation (V System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 26 TX bit rate is ISO14443B high bit rate 212 kbps different than RX ISO14443B high bit rate 424 kbps (reg03) ISO14443B high bit rate 848 kbps Tag-it System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 27 = 1, tm_st0 = 1 end of RX SOF Tm_lengthD Timer length MSB Tm_lengthC Timer length Tm_lengthB Timer length Tm_lengthA Timer length Tm_length9 Timer length Tm_length8 Timer length LSB System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 28 Preset: 755 μs ISO15693 Preset: 1812 μs ISO15693 low data rate NoResp4 Preset: 604 μs Tag-It NoResp3 Preset: 529 μs all other protocols NoResp2 NoResp1 NoResp0 No response LSB System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 29 Modulation depth MSB Mod Type and % ASK 10% Modulation depth OOK (100%) Modulation depth LSB ASK 7% ASK 8.5% ASK 13% ASK 16% ASK 22% ASK 30% System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 30 Default is LOW. Unused Default is LOW. vrs2 Voltage set MSB vrs3_5 = L: VDD_RF, VDD_A, VDD_X range 2.7 V to 3.4 V vrs1 vrs0 Voltage set LSB System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 31 In other protocols, it shows the bit position of error, either frame, SOF-EOF, parity, or CRC error. Col5 Col4 Col3 Col2 Col1 Col0 Bit position of collision LSB System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 32 Active channel is default AM and can be set to PM with option bit B3 of chip per step) MSB state control register (00). rssi_1 rssi_0 RSSI value of active channel (4 dB per step) LSB System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 33 It is taken into account only when broken byte flag is set. Broken byte number of bits bb[0] Broken byte flag If 1, indicates that last byte is not complete 8 bits wide. System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 34: Direct Commands From Mcu To Reader

    When this command is received, the reader transmits the next slot command. The next slot sign is defined by the protocol selection. 5.4.8 Receiver Gain Adjust This command should be executed when the MCU determines that no TAG response is coming and when System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 35 5.4.12 Enable Receiver This command clears the reset mode in the digital part of the receiver if the reset mode was entered by the block receiver command. System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 36: Reader Communication Interface

    Bit 2 Address/Command bit 2 Adr 2 Cmd 2 Bit 1 Address/Command bit 1 Adr 1 Cmd 1 Bit 0 Address/Command bit 0 Adr 0 Cmd 0 System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 37 Non-continuous address mode (single address mode) Start Adr x Data(x) Adr y Data(y) Adr z Data(z) StopSgl Command mode Start Cmd x (Optional data or command) Stop System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 38: Parallel Interface Communication

    [7] dN [7] I/O_[6:0] a0 [6:0] d0 [6:0] d1 [6:0] d2 [6:0] d3 [6:0] dN [6:0] Figure 5-6. Parallel Interface Communication With Continuous Stop Condition StopCont System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 39 [6:0] d0 [6:0] d1 [6:0] d2 [6:0] d3 [6:0] dN [6:0] Internal OE Output Data Valid Ouput Data Figure 5-7. Data Output Only When CLK Is High System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 40: Serial Interface Communication

    Figure 5-9. Communication is terminated when the SS* signal goes high. All words must be 8 bits long with the MSB transmitted first. System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 41 TRF7960 TRF7961 www.ti.com SLOU186F – AUGUST 2006 – REVISED AUGUST 2010 Write Operation SCLK MOSI Figure 5-9. Serial–SPI Interface Communication (Write Mode) System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 42 The MOSI (serial data out) should not have any transitions (all high or all low) during the read cycle. Also, the SS* should be low during the whole write and read operation. The continuous read operation is illustrated in Figure 5-11 System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 43 IRQ Status Register SCLK MOSI No Data Transitions (All High/Low) No Data Transitions (All High/Low) Ignore MISO Don’t Care Figure 5-12. SPI Interface Communication (IRQ Status Register Read) System Description Copyright © 2006–2010, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: TRF7960 TRF7961...
  • Page 44: External Power Amplifier Application

    External Power Amplifier Application Applications requiring an extended read range can use an external power amplifier together with the TRF7960/61. This can be implemented by adding an external power amplifier on the transmit side and external sub-carrier detectors on the receive side.
  • Page 45 PACKAGE OPTION ADDENDUM www.ti.com 25-Jul-2012 PACKAGING INFORMATION Orderable Device Package Type Package Pins Package Qty Lead/ Samples Status Eco Plan MSL Peak Temp Drawing Ball Finish (Requires Login) TRF7960RHBR ACTIVE 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR & no Sb/Br) TRF7960RHBT ACTIVE Green (RoHS...
  • Page 46 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) TRF7960RHBR 3000 330.0 12.4 12.0 TRF7960RHBT 180.0 12.4 12.0 TRF7961RHBR...
  • Page 47 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) TRF7960RHBR 3000 367.0 367.0 35.0 TRF7960RHBT 210.0 185.0 35.0 TRF7961RHBR 3000 367.0 367.0 35.0 TRF7961RHBT 210.0 185.0 35.0 Pack Materials-Page 2...
  • Page 51 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
  • Page 52 Federal Communication Commission Interference Statement This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation.
  • Page 53 Radiation Exposure Statement: The product is a low power device and its output power is lower than FCC SAR exemption level. This module can be used with Getac PDA: PS336. This device is intended only for OEM integrators under the following conditions: 1) The transmitter module may not be co-located with any other transmitter or antenna.

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