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Chapter 4: Getting Started
Figure 4-24
Figure 4-25
Part No. 24001157
Revision C
Port Timing, VersaMux = DCE
Figure 4-24
shows the VersaMux-4000 in DCE mode and receiving its master clock
from one of its ports. The VersaMux uses the system reference (ClkRef) to
generate the DCE Tx Clock (Transmit Signal Element Timing- DCE Source) and Rx
Clock (Receiver Signal Element Timing- DCE Source) signals. With the TxClkSrc set
to TxClkIn, the VersaMux uses the Tx Clock signal from the DTE (Transmit Signal
Element Timing- DTE Source) to clock the Transmitted Data in from the DTE.
Typically the DTE would use the VersaMux DCE Tx Clock or DCE Rx Clock to
generate its system reference.
ClkRef = Port (Port-1, Port-2, Port-3, Port-4)
Port Interfaces
Primary
Reference Source
(PRS)
VersaMux-4000, DCE Mode, Port Timing, TxClkSrc = TxClkIn
Figure 4-25
is similar to
Figure 4-24
the VersaMux uses its system reference to clock the Transmitted Data in from the
DTE.
VersaMux-4000 (DCE)
ClkRef = Port (Port-1, Port-2, Port-3, Port-4)
Port Interfaces
Primary
Reference Source
(PRS)
VersaMux-4000, DCE Mode, Port Timing, TxClkSrc = System
VersaMux-4000 Operation & Installation Guide
VersaMux-4000 (DCE)
Mode = DCE
TxClkSrc = TxClkIn
ClkRef
except that with the TxClkSrc set to System,
Mode = DCE
TxClkSrc = System
ClkRef
Planning the Timing
DTE Device
Tx Clock (DCE)
Tx Clock (DTE)
Transmitted Data
Rx Data
Rx Clock (DCE)
NRZ Interface
DTE Device
Tx Clock (DCE)
Tx Clock (DTE)
Transmitted Data
Rx Data
Rx Clock (DCE)
NRZ Interface
Page 4-19
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