Table of Contents Chapter 5 Band Speciﬁc Information Table of Contents Chapter Page UHF (403-470MHz) ................5A.1-i VHF (136-174MHz) ................5B.1-i Midband (66-88MHz) ................5C.1-i Band Specific Information...
Table of Contents 5-ii Band Specific Information...
Table of Contents Chapter 5C 66-88MHz Speciﬁc Information Table of Contents Chapter 5C.1 Model Chart and Test Speciﬁcations 5C.2 Radio Tuning Procedure 5C.3 Theory of Operation 5C.4 PCB/Schematic Diagrams and Parts Lists 66-88MHz Specific Information 5C-i...
Table of Contents 5C-ii 66-88MHz Specific Information...
Table of Contents Chapter 5C.1 Model Chart and Test Speciﬁcations Table of Contents Paragraph Page Overview..................... 1 Model Chart ....................1 Service Options ................... 2 Test Speciﬁcations ..................3 General ......................3 Transmitter....................3 Receiver....................... 4 Self-quieting Frequencies ................4 Model Chart and Test Specifications 5C.1-i...
Table of Contents 5C.1-ii Model Chart and Test Specifications...
Overview Overview 5C.1 This chapter lists the Midband (66-88MHz) models and technical speciﬁcations available for the GM950 mobile radio. Model Chart GM950 66-88 MHz Midband X = Indicates one of each required Item Description GBN6147_ Packaging Kit GMN6151_ Hand Held Control Microphone N1 GCN6106_ Control Head Model N2 Non-Display GCN6107_...
Technical Speciﬁcation Technical Speciﬁcation General SPECIFICATION ITEM TYPICAL VALUE Frequency Range Midband: 66-88 MHz Channel Spacing 12.5 or 20/25 kHz ±5ppm Frequency Stability Power Supply 10.8 to 15.6V dc, negative earth Dimensions 44x168x160 mm (HxWxD) Weight 1030g Operational Temperature - 25°C to + 55°C Storage Temperature - 40°C to + 85°C Antenna Connection...
Midband (66-88MHz) Tuning Procedure Midband (66-88MHz) Tuning Procedure 5C.2 General The recommended hardware platform is a 386 or 486 DX 33 PC (personal computer) with 8 MBytes RAM, MS-DOS™ 5.0, Windows™3.1, and RSS (Radio Service Software). These are required to align the radio.
Midband (66-88MHz) Tuning Procedure CAUTION: DO NOT switch radios in the middle of any Service procedure. Always use the Program or Cancel key to close the tuning window before disconnecting the radio. Improper exits from the Service window may leave the radio in an improperly conﬁgured state and result in seriously degraded radio or system performance.
Midband (66-88MHz) Tuning Procedure PA Bias Voltage Adjustment of the PA Bias is critical for proper radio operation. Improper adjustment will result in poor operation and may damage the PA FET device. For this reason, the PA bias must be set before the transmitter is keyed the ﬁrst time.
Midband (66-88MHz) Tuning Procedure Transmitter Power The radio has two power level settings, a high power level setting, and a low power level setting. IMPORTANT: To set the transmitter power for customer applications use the Per Radio window under the Edit menu and set the “Power 1” and “Power 2” powers to the desired values.
Midband (66-88MHz) Tuning Procedure Table 2-2 Reference Oscillator Alignment. RF-Band Target ±150 Hz All bands Front-End Filter Alignment of the front-end pre-selector is normally not required on these radios. Only if the radio has poor receiver sensitivity or the pre-selector parts have been replaced the following procedure should be performed.
Midband (66-88MHz) Tuning Procedure Rated Volume The rated volume softpot sets the maximum volume at normal test modulation. Set test box (GTF180) meter selection switch to the “AUDIO PA” position and the speaker load switch to the “MAXAR” position. Connect an AC voltmeter to the test box meter port. From the Service menu, select Rx Alignments.
Midband (66-88MHz) Tuning Procedure Transmit Modulation Balance (Compensation) Compensation alignment balances the modulation sensitivity of the VCO and reference modulation (synthesizer low frequency port) lines. Compensation algorithm is critical to the operation of signalling schemes that have very low frequency components (e.g. DPL) and could result in distorted waveforms if improperly adjusted.
Midband (66-88MHz) Tuning Procedure Click the Toggle PTT button to dekey the radio. Repeat steps 4 - 7 for the remaining test frequencies. Click the Program button to store the softpot values. Table 2-5 Transmitter Deviation. Channel Spacing Deviation 12.5 kHz 2.2-2.3 kHz 20 kHz 3.4-3.6 kHz...
Midband (66-88MHz) Tuning Procedure 1.12 DTMF Transmit Deviation The DTMF Deviation Softpot is used to tune the DTMF deviation. Tuning is performed at one frequency. The radio generates the required tones while the tuning window is open. Values for other frequencies are calculated by the radio software.
Midband (66-88MHz) Tuning Procedure 5C.2-10 Radio Tuning Procedure...
Table of Contents Chapter 5C.3 Theory of Operation Table of Contents Paragraph Page Overview..................... 1 Open Controller..................1 General ......................1 Voltage Regulators ..................1 Electronic On/Off ..................2 Emergency....................3 Mechanical On/Off ..................3 Ignition ......................3 Hook RSS ....................3 Microprocessor Clock Synthesizer ..............
Table of Contents Paragraph Page TX Secure Audio (optional) ............... 11 Transmit Signalling Circuits ..............12 Sub-audible Data (PL/DPL) ............... 12 High Speed Data ..................13 Dual Tone Multiple Frequency (DTMF) Data..........13 Receive Audio Circuits................14 Squelch Detect ..................14 Audio Processing and Digital Volume Control ...........
It consists of a microprocessor, support memory, support logic, signal MUX ICs, the On/Off circuit, and general purpose Input/Output circuitry. The controller uses the Motorola 68HC11K1 microprocessor (U0101). In addition to the microprocessor, the controller has 3 external memory devices. The 3 memory devices consist of a 32 Kbyte SRAM (U0103), a 256 Kbyte FLASH EEPROM (U0102), and a 4kbyte EEPROM (U0104).
Open Controller Regulator U0601 is used to generate the 9.3 volts required by some audio circuits, the RF circuitry and power control circuitry. Input and output capacitors (C0601-C0603 and C0604/C0605) are used to reduce high frequency noise. R0602/R0603 set the output voltage of the regulator. If the voltage at pin 1 is greater than 1.3 volts the regulator output decreases and if the voltage is less than 1.3 volts the regulator output increases.
Open Controller Emergency The emergency switch (J0400-9), when engaged, grounds the base of Q0441 and pulls the line EMERGENCY CONTROL to low via D0441. EMER IGN SENSE is pulled high by R0441. When the emergency switch is released the base of Q0441 is pulled high by R0442. This causes the collector of transistor Q0441 to go low (0.2V), thereby setting the EMER IGN SENSE line to low.
Open Controller To start SBEP communication this voltage must be above 6V. This condition generates a µP interrupt via VR0102, Q0105, Q0104, Q0106 and enables the BUS+ line for communication via Q0122, Q0121. Microprocessor Clock Synthesizer The clock source for the microprocessor system is generated by the ASFIC (U0201). Upon power- up the synthesizer U5701 (UHF) / U3701 (VHF) / U2701 (MB) generates a 2.1 MHz waveform that is routed from the RF section (via C0202) to the ASFIC (on U0201-E1) For the main board controller the ASFIC uses 2.1MHz as a reference input clock signal for its internal synthesizer.
Open Controller When the µP needs to program any of these IC’s it brings the chip select line for that IC to a logic 0 and then sends the proper data and clock signals. The amount of data sent to the various IC’s are different, for example the FRAC-N can receive up to 21 bytes (168 bits) while the DAC can receive up to 3 bytes (24 bits).
Open Controller 2.11 General Purpose Input/Output The Controller provides one general purpose line (GP I/O) available on the accessory connector J0400-12 to interface to external options. The software and the hardware conﬁguration of the radio model deﬁnes the function of the port. The port uses an output transistor (Q0432) controlled by µP via ASFIC port GCB3 (pin B3) and an input transistor (Q0431) read by µP port PA7 (pin 4).
Open Controller The K1µP provides an address bus of 16 address lines (A0-A15), and a data bus of 8 data lines (D0- D7). There are also three control lines; CSPROG (U0101-29) to chip select U0102-30 (FLASH EEPROM), CSGP2 (U0101-28) to chip select U0103-20 (SRAM) and PG7_R_W to select whether to read or to write.
Open Controller 2.13 FLASH Electronically Erasable Programmable Memory (FLASH EEPROM) The 256 KByte FLASH EEPROM (U0102) contains the radio operating software. This software is common to all open architecture radios within a given model type. This is, as opposed to the codeplug information stored in EEPROM (U0104) which could be different from one user to another in the same company.
General 2.15 Static Random Access Memory (SRAM) The SRAM (U0103) contains temporary radio calculations or parameters that can change very frequently, and which are generated and stored by the software during its normal operation. The information is lost when the radio is turned off. The device allows an unlimited number of write cycles.
Transmit Audio Circuits Transmit Audio Circuits Refer to Figure 3.1 for reference for the following sections. Mic Input Path The radio supports two distinct microphone paths known as internal (from Control Head) and external mic (from accessory connector J0400-2) and an auxiliary path (FLAT TX AUDIO). The microphones used for the radio require a DC biasing voltage provided by a resistive network.
Transmit Audio Circuits External Mic Path The external microphone signal enters the radio on accessory connector J0400 pin 2 and is routed to the ASFIC (U0201-A7) through resistor R0414, capacitor C0413 and line EXT MIC, with DC bias provided by R0415 / R0416. R0415 and C0417 provide a 1kΩ AC path to ground that sets the input impedance for the microphone and determines the gain based on the emitter resistor in the microphone’s ampliﬁer circuit.
Transmit Signalling Circuits Transmit Signalling Circuits Refer to Figure 3.2 for reference for the following sections. From a hardware point of view, there are three types of signalling: Sub-audible data (PL/DPL/Connect Tone) that gets summed with transmit voice or signalling, DTMF data for telephone communication in trunked and conventional systems, and Audible signalling including Select 5, MPT-1327, MDC, High speed Trunking.
Transmit Signalling Circuits High Speed Data High speed data refers to the 3600 baud data waveforms, known as Inbound Signalling Words (ISWs) used in a trunking system for high speed communication between the central controller and the radio. To generate an ISW, the µP ﬁrst programs the ASFIC (U0201) to the proper ﬁlter and gain settings.
Receive Audio Circuits CH ACT is routed to the µP pin 25 (pin 40 from version 0102726B09_Cntl on) while SQ DET adds up with LOCK DET, weighted by resistors R0113, R0114, and is routed to one of the µP´s ADC inputs U0101-43.
Receive Audio Circuits The audio PA is enabled via AUDIO PA ENABLE signal from the ASFIC (U0201-B5). When the base of Q0401 is low, the transistor is off and U0401-8 is high, using pull up resistor R0406, and the Audio PA is ON.
Receive Signalling Circuits Receive Signalling Circuits Refer to Figure 3.4 for reference for the following sections. LOW SPEED HIGH SPEED CLOCK CLOCK DATA FILTER LIMITER AND DEEMPHASIS MICRO CONTROLLER ASFIC DET AUDIO U0201 U0101 DISCRIMINATOR AUDIO FROM RF SECTION (IF IC) FILTER LIMITER LOW SPEED...
Receive Signalling Circuits The allowable internal alert tones are 304, 608, 911, and 1823Hz. In this case a code contained within the SPI BUS load to the ASFIC sets up the path and determines the tone frequency, and at what volume level to generate the tone. (It does not have to be related to the voice volume setting). For external alert tones, the µP can generate any tone within the 100-3000Hz audio band.
5C.3 Midband SPECIFIC CIRCUIT DESCRIPTION Receiver Front-End The receiver is able to cover the MB range from 66 to 88 MHz. It consists of four major blocks: front- end, mixer, ﬁrst IF section and IF IC. Antenna signal pre-selection is performed by two varactor tuned bandpass ﬁlters.
Transmitter Power Ampliﬁer (PA) 5-25W IF IC (U2201) The ﬁrst IF signal from the crystal ﬁlters feeds the IF IC (U2201) at pin 6. Within the IF IC the 21.4MHz ﬁrst IF signal mixes with the second local oscillator (LO) at 20.945MHz to the second IF at 455 kHz.
Transmitter Power Ampliﬁer (PA) 5-25W PA Stages The following stage uses an enhancement mode N-Channel MOS FET device (Q2521) and requires a positive gate bias and a quiescent current ﬂow for proper operation. The voltage of the line BIAS VLTG is set in transmit mode by a Digital to Analogue (D/A) converter (U0731-4) and fed to the gate of Q2521 via the resistive network R2613, R2614, R2615.
Transmitter Power Ampliﬁer (PA) 5-25W Harmonic Filter The transmitter signal from the antenna switch is channelled through the harmonic ﬁlter to the antenna connector J2501.The harmonic ﬁlter is formed by inductors L2551, L2552, and capacitors C2551 through to C2554 This network forms a low-pass ﬁlter to attenuate harmonic energy of the transmitter to speciﬁcations level.
Frequency Synthesis Rise and fall time of the output power during transmitter keying and dekeying is controlled by the comparator formed by opamp U0701-3. During normal transmitter operation the voltage at U701-3 pin 13 is higher than the voltage at pin 12 causing the output at pin 14 being low and switching off transistor Q0711.
Frequency Synthesis In order to generate a high voltage to supply the phase detector (charge pump) output stage at pin VCP (U2701-32), a voltage of 13 VDC is being generated by the positive voltage multiplier circuitry (D2701-1-3, C2716, C2717). This voltage multiplier is basically a diode capacitor network driven by two (1.05 MHz) 180 degrees out of phase signals (U2701-9 and -10).
Frequency Synthesis The output signal of the phase detector is a pulsed DC signal which is routed to the charge pump. The charge pump outputs a current at pin 29 (I OUT of U2701). The loop ﬁlter (which consists of R2715 - R2718, C2723 - C2725, C2727, C2735) transforms this current into a voltage that is applied to the varactor diodes D2732, D2733 (TX), D2751, D2752 (RX) and alters the output frequency of the TX VCO (Q2741) and RX VCO (Q2751).
Frequency Synthesis 5C.3-26 Theory of Operation...
Table of Contents Chapter 5C.4 PCB/Schematic Diagrams and Parts Lists Table of Contents Description Page Midband (66-88MHz) PCB 8486037B03_T1 PCB Layout Component Side ..........1 PCB Layout Solder Side .
Table of Contents Paragraph Page Power Ampliﬁer 5-25W Schematic Diagram....... . . 25 Parts List.
Midband (66-88MHz) Power Control Schematic Diagram Power Control Circuit Motorola Description Parts List Part No. R0714 0662057A81 22k 1/16W 5% Circuit Motorola Description Part No. R0715 0662057A81 22k 1/16W 5% C0701 2113740F51 100pF 5% 50V R0716 0662057B16 560k 1/16W 5%...
Midband (66-88MHz) Power Control Schematic Diagram Power Control Circuit Motorola Description Parts List Part No. R0712 0662057A37 330 1/16W 5% Circuit Motorola Description Part No. R0713 0662057A61 3k3 1/16W 5% C0701 2113740F51 100pF 5% 50V R0714 0662057A81 22k 1/16W 5%...