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IC305 : ST232CDR
PIN DESCRIPTION
PIN No
SYM BOL
1
C
+
Positive Terminal for the first Charge Pump Capacitor
1
2
V+
Doubled Voltage Terminal
3
C
-
Negative Terminal for the first Charge Pump Capacitor
1
4
C
+
Positive Terminal for the second Charge Pump Capacitor
2
5
C
-
Negative Terminal for the second Charge Pump Capacitor
2
6
V-
Inverted Voltage Terminal
7
T2
Second Transmitter Output Voltage
OUT
8
R2
Second Receiver Input Voltage
IN
9
R2
Second Receiver Output Voltage
OUT
10
T2
Second Transmitter Input Voltage
IN
11
T1
First Transmitter Input Voltage
IN
12
R1
First Receiver Output Voltage
OUT
13
R1
First Receiver Input Voltage
IN
14
T1
First Transmitter Output Voltage
OUT
15
GND
Ground
16
V
Supply Voltage
CC
+5V INPUT
+
C5
16
1
Vcc
C1+
+
+5V TO +10V
C1
VOLTAGE
3
C1-
DOUBLER
4
C2+
+
+10V TO -10V
C2
VOLTAGE
C2-
INVERTER
5
+5V
400K
11
T1
IN
T1
+5V
TTL / CMOS INPUTS
400K
10
T2
IN
T2
12
R1
OUT
R1
TTL / CMOS OUTPUTS
9
R2
OUT
R2
GND
15
NAM E AND F UNCTION
C3
+
2
+10V
V+
6
-10V
V-
C4
+
T1
14
OUT
RS 232 OUTPUTS
T2
OUT
7
R1
13
IN
5K
RS 232 INPUTS
R2
8
IN
5K
41
IC306 : BU1924F / RDS
MUX
100kΩ
(4)
270p
120kΩ
100kΩ
anti-aliasing
filter
(3)
Vref
2.2μF
V
DD1
(5)
∗1
Analog
Power supply
V
(6)
SS1
PLL
PLL
57kH
Z
∗1
(12)
1187.5Hz
V
RDS/ARI
DD2
∗2
Digital
Power supply
(11)
V
SS2
Reference
clock
(13)
(14)
XI
XO
4.332MH
Z
∗1 : V
∗2 : Have V
33pF
33pF
∗3 : Match the capacitor constants with the crystal manufacturer.
∗3
∗3
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Pin No.
Symbol
Pin name
1
QUAL
Demodulator quality
Good data : High, bad data : Low
Refer to output data timing
2
RDATA
Demodulator data
3
Vref
Reference voltage
1/2 V
(refer to input/output circuits)
D D1
4
MUX
Input
Composite signal input (refer to input/output circuits)
5
V
D D1
Analog power supply 4.5V to 5.5V
6
V
S S1
7
V
GND
S S3
8
CMP
Comparator input
C-junction (refer to input/output circuits )
9
T2
Test input
Open or connected to ground
10
T1
11
V
D D2
Digital power supply 4.5V to 5.5V
12
V
S S2
13
XI
Connects to 4.332MHz oscillator
Crystal oscillator
(refer to input/output circuits)
14
XO
−
15
(N.C.)
16
RCLK
Demodulator clock
1187.5Hz clock (refer to the timing diagram)
42
560p
CMP
(7)
(8)
V
SS3
8th Switched
capacitor filter
comparator
(16)
RCLK
QUAL
(1)
RDATA
(2)
Bi-phase
Differential
decoder
decoder
Measurement
circuit
(10)
(9)
T2
T1
and V
are separated within the IC.
DD1
DD2
(digital power supply) of a sufficiently low impedance.
DD2
Functions
Input/Output type
Type C
−
Type E
Type D
−
−
−
Type D
Type B
−
Type A
−
−
Type C
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