IC41 : CS4398CZ
1.8 V to 5 V
Register/Hardware
2
Hardware or I
C/SPI
Configuration
Control Data
1.8 V to 5V
PCM Input
DSD Input
Pin Name
Pin #
DSD_A
28
Direct Stream Digital Input (Input) - Input for Direct Stream Digital serial audio data.
DSD_B
1
DSD_SCLK
2
DSD Serial Clock (Input) - Serial clock for the Direct Stream Digital audio interface.
SDIN
3
Serial Audio Data Input (Input) - Input for two's complement serial audio data.
SCLK
4
Serial Clock (Input) - Serial clock for the serial audio interface.
Left Right Clock (Input) - Determines which channel, Left or Right, is currently active on
LRCK
5
the serial audio data line.
MCLK
6
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
VD
7
Digital Power (Input) - Positive power for the digital section.
DGND
8
Digital Ground (Input) - Ground reference for the digital section.
RST
13
Reset (Input) - The device enters system reset when enabled.
VLC
14
Control Port Power (Input) - Positive power for Control Port I/O.
Positive Voltage Reference (Output) - Positive reference voltage for the internal sam-
FILT+
15
pling circuits.
REF_GND
16
Reference Ground (Input) - Ground reference for the internal sampling circuits.
VREF
17
Voltage Reference (Input) - Positive voltage reference for the internal sampling circuits.
Mute Control (Output) - The Mute Control pin is active during power-up initialization, mut-
BMUTEC
18
ing, power-down or if the master clock to left/right clock frequency ratio is incorrect. During
AMUTEC
25
reset, these outputs are set to a high impedance.
AOUTB+
20
Differential Right Channel Analog Output (Output) - The full-scale differential analog
AOUTB-
19
output level is specified in the Analog Characteristics specification table.
AGND
21
Analog Ground (Input) - Ground reference for the analog section.
VA
22
Analog Power (Input) - Positive power for the analog section.
AOUTA+
23
Differential Left Channel Analog Output (Output) - The full-scale differential analog out-
AOUTA-
24
put level is specified in the Analog Characteristics specification table.
VQ
26
Quiescent Voltage (Output) - Filter connection for internal quiescent voltage.
VLS
27
Serial Audio Interface Power (Input) - Positive power for serial audio interface I/O.
Stand-Alone Mode Definitions
M3
9
M2
10
Mode Selection (Input) - Determines the operational mode of the device.
M1
11
M0
12
Control Port Mode Definitions
Address Bit 1 (I²C) / Control Data Input (SPI) (Input) - AD1 is a chip address pin in I²C
AD1/CDIN
9
mode; CDIN is the input data line for the Control Port interface in SPI mode.
SCL/CCLK
10
Serial Control Port Clock (Input) - Serial clock for the serial Control Port.
Serial Control Data (I²C) / Control Data Output (SPI) (Input/Output) - SDA is a data I/O
SDA/CDOUT
11
line in I²C mode. CDOUT is the output data line for the Control Port interface in SPI mode.
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin
AD0/CS
12
in I²C mode; CS is the chip select signal for SPI format.
Interpolation
Filter with
Volume Control
Interpolation
PCM
Filter with
Serial
Volume Control
Interface
DSD Processor
DSD
-Volume control
Interface
-50kHz filter
3.3 V to 5 V
Multibit
ΔΣ
Modulator
Multibit
ΔΣ
Modulator
Direct DSD
Pin Description
47
5 V
Switched
Left
Capacitor
Differential
DAC and
Output
Filter
Switched
Right
Capacitor
Differential
DAC and
Output
Filter
External
Left and Right
Mute
Mute Controls
Control
Internal Voltage
Reference