Microprocessor And Ic Data - Marantz DV9600 Service Manual

14. MICROPROCESSOR AND IC DATA

[PM01] QU01: H8S/2238R
Pin PORT Signal name I/O
1 PE5/D5 V_PSW O
2 PE6/D6 P/XI O
3 PE7/D7 N.C. I
4 PD0/D8 DB4 O
5 PD1/D9 DB5 O
6 PD2/D10 DB6 O
7 PD3/D11 DB7 O
8 PD4/D12 E O
9 PD5/D13 R/W O
10 PD6/D14 RS O
11 PD7/D15 N.C. I
12 CVCC
13 PC0/A0 N.C. I
14 VSS
15 PC1/A1 STB_CONT O
16 PC2/A2 STB_LED O
17 PC3/A3 FL_OFF_LED O
18 PC4/A4 DHD I
19 PC5/A5 BYPASS O
20 PC6/A6 N.C. I
21 PC7/A7 N.C. I
22 PB0/A8/TIOCA3 VRST_1 O
23 PB1/A9/TIOCB3 VRST_2 O
24 PB2/A10/TIOCC3 VRST_3 O
25 PB3/A11/TIOCD3 VRST_4 O
26 PB4/A12/TIOCA4 N.C. I
27 PB5/A13/TIOCB4 N.C. I
28 PB6/A14/TIOCA5 MC_RST O
29 PB7/A15/TIOCB5 B/EON I
30 PA0/A16 N.C. I
31 PA1/A17/TxD2 DATAO_OP O
32 PA2/A18/RxD2 DATAI_OP I
33 PA3/A19/SCK2 CLK_OP O
34 P10/TIOCA0/DACK0/A20 IR_IN I
35 P11/TIOCB0/DACK1/A21 N.C. I
36 P12/TIOCC0/TCLKA/A22 N.C. I
37 P13/TIOCD0/TCLKB/A23 N.C. I
38 P14/TIOCA1/IRQ0 CS_OP I
39 P15/TIOCB1/TCLKC /DFRES I
40 P16/TIOCA2/IRQ1 DSPREQ1 I
41 P17/TIOCB2/TCLKD N.C. I
42 AVSS GND
43 P97/DA1 N.C. I
44 P96/DA0 N.C. I
45 P47/AN7 BIT2 I
46 P46/AN6 BIT1 I
47 P45/AN5 BIT0 I
48 P44/AN4 SELECT I
49 P43/AN3 KEY4 I
50 P42/AN2 KEY3 I
51 P41/AN1 KEY2 I
52 P40/AN0 KEY1 I
53 Vref
54 AVCC
55 MD0
56 MD1
57 OSC2
58 OSC1
59 RES CPU_RST
Contents of control
Power supply control for VIDEO. L
Prograssive=H
LCD DRIVER DATA 4
LCD DRIVER DATA 5
LCD DRIVER DATA 6
LCD DRIVER DATA 7
Write enable for LCD DRIVER
Read/Write for LCD DRIVER
Instruction for LCD DRIVER, Select data
STB=L, POWER=H L
LED for standby H
LED for FL OFF H
Head Phone detection port, Head Phone=L L
A.DSP bypass signal, Bypass=L L
Reset for CD0040AF L
Reset for ADV7314/7310 L
Reset for PD0280B (Scaler) L
Reset for SiI9290 (HDMI) L
Reset for B/E L
STB mode input port for B/E
Data output port for B/E
Data input port for B/E
Clock input port for B/E
Input capture
External interruption (Chip selection input port for B/E)
Circumference IC.)
Interruption REQ1 for ADSP
Version distinction 3
Version distinction 2
Version distinction 1
Model distinction
L:DV8500 H:OEM
KEY_4 input
KEY_3 input
KEY_2 input
KEY_1 input
CPU reset signal
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[PM01] QU01: H8S/2238R
Pin PORT Signal name
60 NMI
61 STBY
62 VCC
63 XTAL
64 VSS GND
65 EXTAL
66 "FEW"
67 MD2
68 PF7 VFD_CLK
69 PF6 VFD_CE
70 PF5/RD VFD_SDA
71 PF4/HWR VFD_RES
72 PF3/LWR/ADTRG/IRQ3 KEY4
73 PF2/WAIT N.C.
74 PF1/BACK/BUZZ CTS
75 PF0/BREQ/IRQ2 RTS
76 P30/TxD0 RS_TXD/TXD2
77 P31/RxD0 RS_RXD/RXD2
78 P32/SCK0/SDA1/IRQ4 SDA1
79 P33/TxD1/SCL1 SCL1
80 P34/RxD1/SDA0 SDA2
81 P35/SCK1/SCL0/IRQ5 SDA2
82 P36 SCS
83 P77/TxD3 DSPDOUT
84 P76/RxD3 DSPDIN
85 P75/TMO3/SCK3 DSPCLK
86 P74/TMO2/MRES FCS
87 P73/TMO1/TEND1/CS7 HINBSY
88 P72/TMO0/TEND0/CS6 RSTDSP
89 P71/TMRI23/TMCI23/DREQ1/CS5 FILT_SEL
90 P70/TMRI01/TMCI01/DREQ0/CS4 DIR_DSD
91 PG0/IRQ6 DSPREQ2
92 PG1/CS3/IRQ7 HDMI_INT
93 PG2/CS2 CCLK
94 PG3/CS1 CDOUT
95 PG4/CS0 CDIN
96 PE0/D0 CS1
97 PE1/D1 CS2
98 PE2/D2 RST
99 PE3/D3 DAC_MUTE1
100 PE4/D4 DAC_MUTE2
I/O Contents of control
Power supply
O Clock output port for LC75712. Software serial
O Chip enable output port for LC75712.
O Data output port for LC75712. Software serial
O Reset for LC75712.
I External interruption (POWER/STANDBY SW detection)
I
I CTS input of RS232C
O RTS input of RS232C
O RS232C output
I RS232C input
I/O EEPROM/ADV7310/ADV7314
O EEPROM/ADV7310/ADV7314
I/O HDMI
O HDMI
O Chip selection port for A.DSP.
O Serial data output port for A.DSP.
I Serial data input port for A.DSP.
O Clock output port for A.DSP.
O Chip selection port for A.DSP. L
I
O Reset for A.DSP. L
I Audio DAC detection
I Audio DAC detection
I Interruption REQ2 for ADSP
I Interruption signal for SiI9190 L
O Clock for CS4398 DAC Software serial
O Data output port for CS4398 DAC Software serial
I Data input for CS4398 DAC Software serial
O Chip selection port for CS4398 DAC L
O Chip selection port for CS4399 DAC L
O Reset for CS4398 DAC L
O Mute for audio L
O Mute for audio L
154