Pin Descriptions Of Ic - Philips HDD100 Service Manual

PIN DESCRIPTIONS OF IC CY7C68013
4.1 CY7C68013 Pin Descriptions
Table 4-1. FX2 Pin Descriptions
128 100 56 56
TQFP TQFP SSOP QFN
10 9 10 3
13 12 13 6
19 18 16 9
18 17 15 8
94
95
96
97
117
118
119
120
126
127
128
21
22
23
24
25
59
60
61
62
63
86
87
88
39
34 28
99 77 49 42 RESET#
Note:
5. Unused inputs should not be left floating. Tie either HIGH or LOW as appropriate. Outputs should only be pulled up or down to ensure signals at power-up and
in standby.
[5]
Name Type Default
AVCC Power N/A
AGND Power N/A
DMINUS I/O/Z
DPLUS I/O/Z
A0 Output
A1 Output
A2 Output
A3 Output
A 4 Output
A 5 Output
A 6 Output
A 7 Output
A 8 Output
A 9 Output
A 10 Output
A11 Output
A12 Output
A13 Output
A14 Output
A15 Output
D0 I/O/Z
D1 I/O/Z
D2 I/O/Z
D3 I/O/Z
D4 I/O/Z
D5 I/O/Z
D6 I/O/Z
D7 I/O/Z
PSEN# Output
BKPT Output
Input N/A
3 - 1
Analog V . This signal provides power to the analog section of
CC
the chip.
Analog Ground. Connect to ground with as short a path as possi-
ble.
Z USB D– Signal. Connect to the USB D– signal.
Z USB D+ Signal. Connect to the USB D+ signal.
L 8051 Address Bus. This bus is driven at all times. When the 8051
is addressing internal RAM it reflects the internal address.
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Z 8051 Data Bus. This bidirectional bus is high-impedance when
inactive, input for bus reads, and output for bus writes. The data
Z
bus is used for external 8051 program and data memory. The data
Z
bus is active only for external bus accesses, and is driven LOW in
suspend.
Z
Z
Z
Z
Z
H Program Store Enable. This active-LOW signal indicates an 8051
code fetch from external memory. It is active for program memory
fetches from 0x2000–0xFFFF when the EA pin is LOW, or from
0x0000–0xFFFF when the EA pin is HIGH.
L Breakpoint. This pin goes active (HIGH) when the 8051 address
bus matches the BPADDRH/L registers and breakpoints are en-
abled in the BREAKPT register (BPEN = 1). If the BPPULSE bit in
the BREAKPT register is HIGH, this signal pulses HIGH for eight
12-/24-/48-MHz clocks. If the BPPULSE bit is LOW, the signal re-
mains HIGH until the 8051 clears the BREAK bit (by writing 1 to it)
in the BREAKPT register.
Active LOW Reset. Resets the entire chip. This pin is normally tied
to V through a 100K resistor, and to GND through a 0.1-µF ca-
CC
pacitor.
Description