Philips CEM3000B Service Manual page 67

Mini system
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S5L8035Ui (Preliminary Spec)
FEATURES (CONTINUED)
Memory Controller
Supports 16-bit or 8-bit data bus width for 16M
SDRAM interface. (up to 128Mbits)
SDRAM Interface Supports four bank, 8-bit or
16-bit data, burst(up to 16burst) mode SDRAM.
Supports Serial-Flash interface
Supports 4-bit or 8-bit or 16bit data bus width for
EDO interface. (up to 64Mbits)
Supports 3.5Mbit Internal ROM interface
Supports 32KB Internal SRAM interface
Fully Programmable access cycles for all
memories.
Clock & Power Manager
Low power consumption
On-chip PLLs
Clock can be fed selectively to each function
block by software.
Power mode: Normal, Slow, Idle, stop, power
down mode.
Normal mode: normal operating mode.
Slow mode: Low frequency clock without PLL.
Idle mode: Stop CPU clock only
Stop mode: Stop all clock
Power down mode: Power off chip
Wake up by interrupt from Idle mode.
Wake up by external interrupt from Stop mode.
Wake up by external Host or Key from Power
down mode.
S/W Reset by MCU for Peripheral module reset.
Interrupt Controller
32 interrupt sources
(Watch dog timer, 4 Timers, UART, 4 External
interrupts, IIC, IIS, SPI, IR ...)
Edge detect mode on external interrupt source.
Programmable polarity of rising and falling.
Supports FIQ (Fast Interrupt request) for very
urgent interrupt request.
Timers
16-bit timer 1, 2
– Interval, free run, one shot and capture mode
– Programmable duty cycle, frequency and
polarity.
16-bit timer 3, 4
– Interval mode and free run mode
– Supports external clock source.
32-bit SCR timer
General Purpose Input/Output Ports
1 external interrupt port(extension possible to 4
ports)
Up to 36 multiplexed input/output ports
IIC-BUS Interface
1-channel multi-master IIC-Bus.
Serial, 8-bit oriented and bi-directional data
transfers can be made at up to 100 Kbit/s
(standard mode) or up to 400 Kbit/s (fast mode)
UART
channel UART with DMA-based or interrupt-
based operation
Supports 5, 6, 7 or 8-bit serial data
transmit/receive
Supports H/W handshaking during
transmit/receive
Programmable baud rate
Loop back mode for testing
Internal 16-byte Tx FIFO and 16-byte Rx FIFO
Max 1.5Mbps burst transmit/receive rate used by
IODMA
PRODUCT OVERVIEW
1-5

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