Philips CEM3000B Service Manual page 66

PRODUCT OVERVIEW
FEATURES
Processor Architecture
• CalmADM3 MCU+DSP solution
• CalmRISC16: 16-bit RISC architecture
• CalmMAC24: 24-bit DSP for audio applications
• Harvard cache architecture with separate 4KB
Instruction and 12KB Data cache
• Two stream buffers for efficient audio stream
access
• Up to 135MHz operating frequency
CalmRISC16
• 16-bit embedded RISC MCU core with high
performance, low power consumption and
efficient coprocessor interface
• Harvard RISC architecture
• Sixteen 16-bit general registers, Eight 6-bit
extension registers, 22-bit Program Counter
(PC)
CalmMAC24
• 24-bit high performance fixed-point DSP
coprocessor for audio signal processing
• 24x24 MAC operation in 1 cycle
• 2 multiplier accumulator registers, 4 general
accumulator registers and 8 pointer registers
I-Cache Memory
• A direct mapped I-Cache (4KB)
• 16 entries (8-words) with one valid bit per line
D-Cache Memory
• 2 way set-associative data caches (X and Y-
Caches, 6KB each)
1-4
• 8 entries (6-words) with one valid bit and one
dirty bit per a Mac data line
• 8 entries (4-words) with one valid bit and one
dirty bit per a Calm data line
• LRU replacement algorithm
• Write back write policy
Supported Content
• CD-DA, CD-MP3
Front-End Unit (FEU)
• Built-in CMOS AFE, digital servo and DSP
• CD 4x compatible digital servo
• Wide capture range PLL
• Built-in EFM slice
• EFM/EFM+ demodulator
• CLV feature
Audio Stream Codec
• MPEG 1/2/2.5 Layer 2/3 decoding
(8k~48kHz, 2 channels, up to 320kbps)
• WMA V4, V7, V8, V9(L1, L2) decoding
• Audio Sampling Frequency: 8~48KHz for
MP3 application
Audio In/Output
• Two channels audio PWM processor used as
audio DAC.
S5L8035Ui (Preliminary Spec)