Texas Instruments TPS61020EVM User Manual
Texas Instruments TPS61020EVM User Manual

Texas Instruments TPS61020EVM User Manual

High-efficiency synchronous boost converters

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TPS61020EVM
High Efficiency Synchronous Boost Converters
User's Guide
November 2003
Power Management Products
SLVU100

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Table of Contents
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Summary of Contents for Texas Instruments TPS61020EVM

  • Page 1 TPS61020EVM High Efficiency Synchronous Boost Converters User’s Guide November 2003 Power Management Products SLVU100...
  • Page 2 TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products & application solutions:...
  • Page 3 EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods.
  • Page 4 EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright  2003, Texas Instruments Incorporated...
  • Page 5 Preface Read This First About This Manual This user’s guide describes the operation of the TPS61020EVM low-power, dc−dc evaluation module (EVM) for a high-efficiency, boost converter. The guide includes setup instructions for the hardware, a schematic diagram, a bill of materials (BOM), and PCB layout drawings for the evaluation module.
  • Page 7: Table Of Contents

    ............. PCB Layout of the TPS61020EVM .
  • Page 8 Contents...
  • Page 9: Introduction

    The EVM makes it possible to evaluate different device modes as well as the device performance. The TPS61020EVM is set to 3.3 V. The TPS61020EVM can be easily set up to provide any output voltage between 1.8 V and 5.5 V by adjusting the external resistor divider.
  • Page 10: Evm Ordering Information

    EVM Ordering Information 1.1 EVM Ordering Information Table 1−1. EVM Ordering Information EVM Number Description TPS61020EVM-025 Adjustable output voltage version set to 3.3 V.
  • Page 11: Evaluation With The Tps61020Evm

    Chapter 2 Evaluation With the TPS61020EVM This chapter details the evaluation process and features of the EVM. For this purpose, a load is connected to the output pins Vout and GND, allowing the load current to be adjusted between 0 A and the maximum current shown in Figure 2−1.
  • Page 12: Maximum Output Current

    Maximum Output Current 2.1 Maximum Output Current Figure 2−1. Maximum Output Current vs Input Voltage 1400 1200 V O = 3.3 V V O = 5 V 1000 V O = 1.8 V V I − Input Voltage − V 2.2 Enable (EN) Jumper This jumper is used to enable the device.
  • Page 13: Efficiency Of Tps61020Evm

    Efficiency of TPS61020EVM 2.4 Efficiency of TPS61020EVM Figure 2−2. Efficiency for 3.3 V 2.4 V I 1.8 V I 0.9 V I I L − Load Current − mA Physically smaller inductors can be used to save board space, or reduce height at the expense of lower efficiency.
  • Page 15: Schematic, Bom, And Pcb Layout

    ..........PCB Layout of the TPS61020EVM .
  • Page 16: Hpa025 Evm Schemataic

    3.1 HPA025 EVM Schemataic Figure 3−1 shows the HPA025 EVM schematic diagram. The bill of materials for the TPS61020EVM is shown in Table 3−1. More details about the design and component selection for the dc-dc converter can be found in the data sheet.
  • Page 17: Pcb Layout Of The Tps61020Evm

    PCB Layout of the TPS61020EVM 3.3 PCB Layout of the TPS61020EVM The figures below show the layout for the EVM. Figure 3−2. Component Placement Figure 3−3. Top Layer Figure 3−4. Bottom Layer Schematic, BOM, and PCB Layout...

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