Table of Contents
Advertisement
Chapter 6 -- Instrument Circuitry--Interface 1000 Schematic/Block Diagrams
Notes on Figure 6-2:
All the resistors summing voltages into the Summing Amplifier input do not have values shown because
•
their values depend on scaling factors too complex for this simplified diagram.
Calibration components are not shown.
•
High frequency sine wave generation is done using a DDS (direct digital synthesis) IC. The DDS's output is
•
filtered with both a high pass and low pass filter. The low pass filter removes the steps in the DDS output.
The high pass filter provides AC coupling to prevent drift in the DDS's offset getting into the applied signal.
In practice, Gamry EIS300 software uses the DDS to apply sine waves with frequencies between 100 Hz to
1 MHz. It uses the Scan DAC to generate sine signals at frequencies below 100 Hz.
A two stage attenuator scales the DDS. On the coarse scale, the maximum output signal is 2.33 V
V
) and the resolution is approximately 0.6 mV
peak
77 mV
and the resolution is approximately 20 µV
rms
Gamry software.
The Scan DAC and Bias DAC signals are filtered before they are applied to the cell. The filter bandwidths
•
are as shown.
Figure 6-2
Interface 1000 Signal Generation Circuitry
/bit. On the fine scale, the maximum is approximately
rms
. AC signal attenuation is handled automatically by
rms
6 - 3
(3.3
rms
Hide quick links:
Advertisement
Table of Contents
