Yamaha RX-V3200 Service Manual page 42

RX-V3200/DSP-AX3200
IC520 : M30802SGP
16bit µ-COM (Main CPU)
P1 /D 109
0 8
P0 /D 110
7 7
P0 /D 111
6 6
P0 /D 112
5 5
P0 /D 113
4 4
P11 114
4
P11 115
3
P11 116
2
P11 117
1
P11 118
0
P0 /D 119
3 3
P0 /D 120
2 2
P0 /D 121
1 1
P0 /D 122
0 0
P15 123
7
P15 124
6
P15 125
5
P15 126
4
P15 127
3
P15 128
2
P15 129
1
V 130
SS
P15 131
0
V 132
CC
P10 /AN /K13 133
7 7
P10 /AN /K12 134
6 6
P10 /AN /K11 135
5 5
P10 /AN /K10 136
4 4
P10 /AN 137
3 3
P10 /AN 138
2 2
P10 /AN 139
1 1
AV 140
SS
P10 /AN 141
0 0
V 142
REF
AV 143
CC
R9 /AD /R D 144
1 1RG X 4
/SCL /ST D
4 X 4
41
M30802SGP
8 8 8
I/O Port
Port P0 Port P1 Port P2
Inside Function
A-D Converter (10 bit x 8 ch,
Timer
Possible to 10 ch)
Timer TA0 (16 bit)
Timer TA1 (16 bit)
UART/Clock Synchronized
Timer TA2 (16 bit)
SI/O (8 bit x 5 ch)
Timer TA3 (16 bit)
Timer TA4 (16 bit)
X-Y Converter
Timer TB0 (16 bit)
(16 bit x 16 bit)
Timer TB1 (16 bit)
Timer TB2 (16 bit)
CRC arithmetic Circuit (CCITT)
Timer TB3 (16 bit)
(X16+X12+X5+1)
Timer TB4 (16 bit)
Timer TB5 (16 bit)
M16C/80 Series 16 bit CPU
Watching Timer Register
(15 bit)
R0H R0L
R0H R0L
R1H R1L
R1H R1L
D-A Converter
R2
R2
(8 bit x 2 ch)
R3
R3
SVP
SVP
VCT
VCT
SVP
SVP
VCT
VCT
Port P15
8
8 8 8 8
Port P3 Port P4 Port P5 Port P6
System clock
X - X
IN OUT
X - X
CIN COUT
Memory
RAM
10K
DRAM
FLG
Controller
INTB
ISP
DMA
USP
Controller
PC
Multiplication
SVF
Controller
SVP
VCT
Port P14 Port P13 Port P12 Port P11
7 8 8 5
72 P4 /CS /A (MA )
4 3 20 12
71 P4 /CS /A
5 2 21
70 P4 /CS /A
6 1 21
69 P4 /CS /A
7 0 23
68 P12
5
67 P12
6
66 P12
7
65 P5 /WRL/WR/CASL
0
64 P5 /WRH/BHE/CASH
1
63 P5 /RD/DW
2
62 P5 /BCLK/ALE/CLK
3 OUT
61 P13
0
60 P13
1
59 V
CC
58 P13
2
57 V
SS
56 P13
3
55 P5 /HLDA/ALE
4
54 P5 /HOLD
5
53 P5 /ALE/RAS
6
52 P5 /RDY
7
51 P13
4
50 P13
5
49 P13
6
48 P13
7
47 P6 /CYS /RTS
0 0 0
46 P6 /CLK
1 0
45 P6 /R D
2 X 0
44 P6 /T D
3 X 0
43 P6 /CTS /RTS /CTS /CLKS
4 1 1 0 1
42 P6 /CLK
5 1
41 V
SS
40 P6 /R D
6 X 1
39 V
CC
38 P5 /T D
7 X 1
37 P7 /T D /SDA /TA (*1)
0 X 2 2 0OUT
(*1) N channnel Open Drain Output