JVC RX-7030VBK Service Manual page 19

Pin No. Symbol I/O
19 NC I
20 ADIF I
21 CAD1 I
22 CAD0 I
23 LOUT3 O
24 ROUT3 O
25 LOUT2 O
26 ROUT2 O
27 LOUT1 O
28 ROUT1 O
29 LIN- I
30 LIN+ I
31 RIN- I
32 RIN+ I
33 DZF2 I
34 VCOM O
35 VREFH I
36 AVDD -
37 AVSS -
38 DZF1 I
39 MCKI I
40 P/S I
41 CSN I
42 CCLK I
43 CDTI I
44 LOOP1 I
Input clock select 1 pin
Input clock select 0 pin
Chip address pin
Used during the serial control mode.
Chip address pin
Used during the serial control mode.
Lch #3 analog output pin
Rch #3 analog output pin
Lch #2 analog output pin
Rch #2 analog output pin
Lch #2 analog output pin
Rch #1 analog output pin
Lch analog negative Input Pin
Lch analog positive Input Pin
Rch analog negative Input Pin
Rch analog positive Input Pin
Negative voltage reference Input pin, AVSS
Common voltage output pin, AVDD/2
Large external capacitor around 2.2uF is used to reduce power-supply noise
Positive voltage reference input pin, AVDD
Analog power supply pin
Analog ground pin
X'tal input pin
External master clock input pin if XTS="L"
Parallel/Serial select pin
"L" : Serial control mode, "H" : Parallel control mode
Chip select pin in serial mode
Control data clock pin in serial mode
Control data input pin in serial mode
Loop back mode pin in parallel mode
Enable all 3 DAC channels to be input from SDTII.
Function
(No.22058)1-19