Power integrations TOP100-4 Manual page 4

V IN
V IN
DRAIN
0
V OUT
0
I OUT
0
V C
0
I C
0
1
Figure 6. Typical Waveforms for (1) Normal Operation, (2) Auto-restart, (3) Latching Shutdown, and (4) Power Down Reset.
Shutdown/Auto-restart
To minimize TOPSwitch power
dissipation, the shutdown/auto-restart
circuit turns the power supply on and off
at a duty cycle of typically 5% if an out
of regulation condition persists. Loss of
regulation interrupts the external current
into the CONTROL pin. V
changes from shunt mode to the
hysteretic auto-restart mode described
above. When the fault condition is
removed, the power supply output
becomes regulated, V regulation returns
C
to shunt mode, and normal operation of
the power supply resumes.
Latching Shutdown
The output overvoltage protection latch
is activated by a high-current pulse into
the CONTROL pin. When set, the latch
turns off the TOPSwitch output.
Activating the power-up reset circuit by
1 2 8
•••
1 2 8
•••
removing and restoring input power, or
momentarily pulling the CONTROL pin
below the power-up reset threshold resets
the latch and allows TOPSwitch to
resume normal power supply operation.
V is regulated in hysteretic mode when
C
the power supply is latched off.
regulation
C
Overtemperature Protection
Temperature protection is provided by a
precision analog circuit that turns the
output MOSFET off when the junction
temperature exceeds the thermal
shutdown temperature (typically 145°C).
Activating the power-up reset circuit by
removing and restoring input power or
momentarily pulling the CONTROL pin
below the power-up reset threshold resets
the latch and allows TOPSwitch to
resume normal power supply operation.
V is regulated in hysteretic mode when
C
the power supply is latched off.
1 2 8 1
•••
1 2 8 1
•••
3
2
TOP100-4
V C(reset)
45 mA
4 1
High-voltage Bias Current Source
This current source biases TOPSwitch
from the DRAIN pin and charges the
CONTROL pin external capacitance
(C ) during start-up or hysteretic
T
operation. Hysteretic operation occurs
during auto-restart and latched
shutdown. The current source is switched
on and off with an effective duty cycle of
approximately 35%. This duty cycle is
determined by the ratio of CONTROL
pin charge (I ) and discharge currents
C
(I and I ). This current source is
CD1 CD2
turned off during normal operation when
the output MOSFET is switching.
PI-1119-110194
5
F
7/ 09