Normal Microprocessor Operation - Motorola 6864115B62-C Detailed Service Manual

Controller Circuits
DIG IN 1 can be used as external PTT input, DATA PTT input or others, set by the CPS.
The µP reads this port via pin 77 and Q0171.
DIG OUT 2 can be used as normal output or external alarm output, set by the CPS. Transistor
Q0173 is controlled by the µP via ASFIC CMP pin 14.
DIG IN 3 is read by µP pin 61 via resistor R0176
DIG IN 5 can be used as normal input or emergency input, set by the CPS. The µP reads this port via
R0179 and µP pin 60. Diode D0179 limits the voltage to protect the µP input.
DIG IN 6 can be used as normal input, set by the CPS. The µP reads this port via pin 74 and Q0181.
DIG IN OUT 4,7,8 are bi-directional and use the same circuit configuration. Each port uses an output
transistor Q0177, Q0183, Q0185 controlled by µP pins 46, 47, 53. The ports are read by µP pins 75,
54, 76. To use one of the ports as input the µP must turn off the corresponding output transistor.
In addition the signals from DIG IN 1, DIG IN OUT 4 are fed to the option board connector J0551 and
the expansion board connector J0451.
1.12

Normal Microprocessor Operation

For this radio, the µP is configured to operate in one of two modes, expanded and bootstrap. In
expanded mode the µP uses external memory devices to operate, whereas in bootstrap operation
the µP uses only its internal memory. In normal operation of the radio the µP is operating in
expanded mode as described below.
In expanded mode on this radio, the µP (U0101) has access to 3 external memory devices; U0121
(FLASH EEPROM), U0122 (SRAM), U0111 (EEPROM). Also, within the µP there are 3Kbytes of
internal RAM, as well as logic to select external memory devices.
The external EEPROM (U0111) space contains the information in the radio which is customer
specific, referred to as the codeplug. This information consists of items such as: 1) what band the
radio operates in, 2) what frequencies are assigned to what channel, and 3) tuning information. (See
the particular device subsection for more details.)
The external SRAM (U0122) as well as the µP's own internal RAM space are used for temporary
calculations required by the software during execution. All of the data stored in both of these
locations is lost when the radio powers off (See the particular device subsection for more details).
The FLASH EEPROM contains the actual Radio Operating Software. This software is common to all
open architecture radios within a given model type. For example Trunking radios may have a
different version of software in the FLASH EEPROM than a non Trunking radio (See the particular
device subsection for more details).
The µP provides an address bus of 16 address lines (ADDR 0 - ADDR 15), and a data bus of 8 data
lines (DATA 0 - DATA 7). There are also 3 control lines; CSPROG (U0101-38) to chip select U0121-
30 (FLASH EEPROM), CSGP2 (U0101-41) to chip select U0122-20 (SRAM) and PG7 R W (U0101-
4) to select whether to read or to write. The external EEPROM (U0111-1), the OPTION BOARD and
EXPANSION BOARD are selected by 3 lines of the µP using address decoder U0141. The chips
ASFIC CMP / FRAC-N / PCIC are selected by line CSX (U0101-2).
When the µP is functioning normally, the address and data lines should be toggling at CMOS logic
levels. Specifically, the logic high levels should be between 4.8 and 5.0V, and the logic low levels
should be between 0 and 0.2V. No other intermediate levels should be observed, and the rise and
fall times should be <30ns.
The low-order address lines (ADDR 0 - ADDR 7) and the data lines (DATA 0-DATA 7) should be
toggling at a high rate, e. g. , you should set your oscilloscope sweep to 1us/div. or faster to observe
individual pulses. High speed CMOS transitions should also be observed on the µP control lines.
1-7