Other; Speb Serial Interface; General Purpose Input/Output; Normal Microprocessor Operation - Motorola MCX600E Service Manual

2.10

SPEB Serial Interface

The SBEP serial interface allows the radio to communicate with the Dealer Programming Software
(DPS) via the Radio Interface Box (RIB). This interface connects to the accessory connector J0400-
6 and comprises BUS+ (J0101-15). The line is bi-directional, meaning that either the radio or the
DPS can drive the line.
When the RIB (Radio Interface Box) is connected to the radio, a voltage on the HOOK RSS line
above 6 volts switches on Q0105. The low state at collector of Q0105 switches Q0104 off and in
turn, Q0106 on. A high to low transition at the collector of Q0106 generates an interrupt via µP pin
61. The µP determines the interrupt source by reading a high at the collector of Q0104 via µP pin 6
and R0125. The switched on Q0105 also switches off Q0122 enabling the µP to read BUS+ via pin
78 and to write BUS+ via pin 79 and transistors Q0123,Q0121. While the radio is sending serial data
at pin 79 via Q0123 and Q0121 it receives an "echo" of the same data at pin 78.
When the voltage on the HOOK RSS line is below 6 volts (RIB is not connected), the high collector
of Q0105 turns on Q0122. The low collector of Q0122 prevents the µP from writing data to BUS+ via
Q0123. In this mode line BUS+ is used for signal SCI RX of the Serial Communication Interface
(SCI). The µP reads the SCI via signal SCI RX (pin 78) and writes via signal SCI TX (pin 79). Both
signals are available on the accessory connector J0400 (SCI DATA OUT, SCI DATA IN).
2.11

General Purpose Input/Output

The Controller provides one general purpose line (GP I/O) available on the accessory connector
J0400-12 to interface to external options. The software and the hardware configuration of the radio
model defines the function of the port. The port uses an output transistor (Q0432) controlled by µP
via ASFIC port GCB3 (pin B3).
An external alarm output, available on J0400 pin 4 is generated by the µP via ASFIC port GCB1 (pin
K3) and transistor Q0411. Input EXTERNAL PTT on J0400 pin 3 is read by the µP via line REAR
PTT and µP pin 8.
2.12

Normal Microprocessor Operation

For this radio, the µP is configured to operate in one of two modes, expanded and bootstrap. In
expanded mode the µP uses external memory devices to operate, whereas in bootstrap operation
the µP uses only its internal memory. In normal operation of the radio the µP is operating in
expanded mode as described below.
In expanded mode on this radio, the µP (U0101) has access to three external memory devices;
U0102 (FLASH EEPROM), U0103 (SRAM), U0104 or U0107 (optional EEPROM). Also, within the
µP there are 768 bytes of internal RAM and 640 bytes of internal EEPROM, as well as logic to select
external memory devices.
The (optional) external EEPROM (U0104 or U0107) as well as the µP's own internal EEPROM
space contain the information in the radio which is customer specific, referred to as the codeplug.
This information consists of items such as: 1) what band the radio operates in, 2) what frequencies
are assigned to what channel, and 3) tuning information. In general tuning information and other
more frequently accessed items are stored in the internal EEPROM (space within the 68HC11K1),
while the remaining data is stored in the external EEPROM. (See the particular device subsection
for more details.)
Theory of Operation
Open Controller
4-5