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The time until an interrupt request occurs (
+ (1 ± 1 instruction cycle)
t
t
=
RI
RIC
t
Where
is the time set by the RIC register. The relation between the RIC register and
RIC
= (RIC3 × 2
+ RIC2 × 2
t
3
RIC
As with the REMOUT time generator, the REM interrupt counter starts counting synchronously with
the rising edge of the τ waveform. The interrupt control circuit generates a REM interrupt synchro-
nously with the τ pulse when the count is completed.
ROUT register writing
RIC register writing
ROUT1–0
RIC3–0
Carrier
τ waveform
REM output
Interrupt signal
Interrupt request
The τ waveform is counted at every rising edge. When the count becomes the number set in the RIC
register, the interrupt factor flag IREM (F0H•D2) is set to "1" and an interrupt occurs in synchroniza-
tion with that riging edge.
Set the next carrier output width and the interrupt timing using this interrupt.
The REM interrupt can be masked through the interrupt mask register EIREM (F2H•D2). However,
regardless of the setting of the interrupt mask register, the interrupt factor flag IREM is set to "1" when
the counting of the interrupt τ cycles are completed.
The interrupt factor flag is reset to "0" by the reading.
Data written to the RIC register is maintained while the REM circuit is ON until the next data is
written. However, the counting of τ waveform starts using the write signal for the RIC register the
same as the ROUT register, so this register data is valid only one time after writing. Consequently,
data must be written every time even when generating the next interrupt in the same cycle count.
The RIC register is undefined at initial reset. However, the counting of τ cycles is not performed until
the RIC register is written after that.
Note: • Once data has been written in the RIC register, avoid writing other data into the register before a
REM interrupt occurs (which would otherwise cause an invalid interrupt).
• The values allowed for the RIC register are 0 to 0EH.
• Reading of the interrupt factor flag is available at EI, but be careful in the following cases.
If the interrupt mask register value corresponding to the interrupt factor flag to be read is set to
"1", an interrupt request will be generated by the interrupt factor flag set timing, or an interrupt
request will not be generated.
E0C6006 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Remote Controller)
t
) is given by:
RI
+ RIC1 × 2 + RIC0) × τ
2
1
1
Fig. 4.9.4.5 REM interrupt timing
EPSON
t
is:
RIC
1
2
37
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