Sony HBD-E780W Service Manual page 78

HBD-E780W/E980W/E985W
Ver. 1.2
• IC Pin Function Description
MB-141 BOARD IC101 CXD9998G-BB (BD DECODER)
Pin No. Pin Name
A2 TXVP_0
A4 TXVN_1
A5 TANA_0
A6 to A8 RX2B to RX0B
A9 RXCKB
A12 AOBCK
A13 NS_XTALI
A14 to
CH2_M to CH0_M
A16
A17 CLK_M
A18 EXT_CAP
A19 VDACG_OUT
A21, A22 VDIN26, VDIN24
A24 to VDIN15, VDIN13,
A27 VDIN11, VDIN9
A28 VDIN7
B3 TXVN_0
B4 TXVP_1
B5 TANA_1
B6 to B8 RX2 to RX0
B9 RXCK
B10 SCL
B12 AOLRCK
B13 NS_XTALO
B14 to
CH2_P to CH0_P
B16
B17 CLK_P
B18 EXT_RES
B19 VDACB_OUT
B21, B22 VDIN27, VDIN25
VDIN16, VDIN14,
B24 to
VDIN12, VDIN8,
B28
VDIN5
C1 FOIN
C2 FOIP
C4 AVSS33_LD
C5 AVDD33_COM
C7, C8 VDD33_HDMI_RX
C10 SDA
C11 AOSDATA0
C12 AOMCLK
C14 TP_PLLG
C15 AVDD33_XTAL
C17 AVDD33_HDMI_TX
C18 VDACR_OUT
C19 VDACX_OUT
C21 VDIN31
C22 VDIN20
C23 VDIN18
C24 CEC
C25 HDMISCK
C26, C27 VDIN10, VDIN4
C28 VDIN3
D1 FPDOCD
D3 RSTI
74
I/O
O Transmit data (positive) output to the ethernet connector
I Receive data (negative) input from the ethernet connector
- Ethernet analog test terminal
I TMDS data (negative) input from the HDMI input selector
I TMDS clock (negative) signal input from the HDMI input selector
O Bit clock (for audio output) signal output to the stream processor
O System clock signal output terminal (27 MHz)
O TMDS data (negative) output to the HDMI ARC OUT connector
O TMDS clock (negative) signal output to the HDMI ARC OUT connector
- Not used
Video (Y) signal output to the video amplifi er
O
(US, Canadian, Australian, Singapore, Taiwan and Thai models)
I/O Not used
I/O Not used
O Request signal output to the system controller
I Receive data (positive) input from the ethernet connector
O Transmit data (negative) output to the ethernet connector
- Ethernet analog test terminal
I TMDS data (positive) input from the HDMI input selector
I TMDS clock (positive) signal input from the HDMI input selector
O I2C clock signal output to the EEPROM
O L/R sampling clock (for audio output) signal output to the stream processor
I System clock signal input terminal (27 MHz)
O TMDS data (positive) output to the HDMI ARC OUT connector
O TMDS clock (positive) signal output to the HDMI ARC OUT connector
- HDMI reference voltage terminal
Video (P ) signal output to the video amplifi er
B
O
(US, Canadian, Australian, Singapore, Taiwan and Thai models)
I/O Not used
I/O Not used
I End detection signal input from the motor driver
I Not used
- Ground terminal
- Power supply terminal (+3.3V)
- Power supply terminal (+3.3V)
I/O Two-way I2C data bus with the EEPROM
O Serial data (for audio output) output to the stream processor
O Master clock (for audio output) signal output to the stream processor
- Test terminal
- Power supply terminal (+3.3V)
- Power supply terminal (+3.3V)
Video (P ) signal output to the video amplifi er
R
O
(US, Canadian, Australian, Singapore, Taiwan and Thai models)
O Video (CVBS) signal output to the video amplifi er
I/O Two-way I2C data bus with the EEPROM
O Karaoke mode information output terminal
I/O Not used
I/O HDMI CEC data input/output terminal
I/O Two-way I2C clock bus with the HDMI ARC OUT connector
I/O Not used
O EEPROM input data selection signal output terminal
I Laser power monitor signal input terminal
I Reset signal input terminal
Description
Not used
Not used
Not used
Not used